interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

jtag: make out_value const 

Tightens up the jtag_add_xxx_scan() API

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2010-03-19 22:06:01 +01:00
parent 96949890ee
commit 5dcad2d34f
5 changed files with 65 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/jtag/jtag.h
View File

@ -2,7 +2,7 @@
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
@ -112,7 +112,7 @@ struct scan_field {
/// The number of bits this field specifies (up to 32)
int num_bits;
/// A pointer to value to be scanned into the device
uint8_t* out_value;
const uint8_t* out_value;
/// A pointer to a 32-bit memory location for data scanned out
uint8_t* in_value;

17
src/jtag/tcl.c
View File

@ -2,7 +2,7 @@
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* Copyright (C) 2009 SoftPLC Corporation *
@ -176,9 +176,10 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args
str = Jim_GetString(args[i + 1], &len);
fields[field_count].num_bits = bits;
fields[field_count].out_value = malloc(DIV_ROUND_UP(bits, 8));
str_to_buf(str, len, fields[field_count].out_value, bits, 0);
fields[field_count].in_value = fields[field_count].out_value;
void * t = malloc(DIV_ROUND_UP(bits, 8));
fields[field_count].out_value = t;
str_to_buf(str, len, t, bits, 0);
fields[field_count].in_value = t;
field_count++;
}
@ -200,7 +201,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args
Jim_GetLong(interp, args[i], &bits);
str = buf_to_str(fields[field_count].in_value, bits, 16);
free(fields[field_count].out_value);
free((void *)fields[field_count].out_value);
Jim_ListAppendElement(interp, list, Jim_NewStringObj(interp, str, strlen(str)));
free(str);
@ -1511,7 +1512,7 @@ COMMAND_HANDLER(handle_irscan_command)
{
int j;
for (j = 0; j < i; j++)
free(fields[j].out_value);
free((void *)fields[j].out_value);
free(fields);
command_print(CMD_CTX, "Tap: %s unknown", CMD_ARGV[i*2]);
@ -1525,7 +1526,7 @@ COMMAND_HANDLER(handle_irscan_command)
retval = parse_u32(CMD_ARGV[i * 2 + 1], &value);
if (ERROR_OK != retval)
goto error_return;
buf_set_u32(fields[i].out_value, 0, field_size, value);
buf_set_u32((void *)fields[i].out_value, 0, field_size, value);
fields[i].in_value = NULL;
}
@ -1538,7 +1539,7 @@ error_return:
for (i = 0; i < num_fields; i++)
{
if (NULL != fields[i].out_value)
free(fields[i].out_value);
free((void *)fields[i].out_value);
}
free (fields);

24
src/target/embeddedice.c
View File

@ -2,7 +2,7 @@
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008,2009 Øyvind Harboe *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* Copyright (C) 2008 by Spencer Oliver *
@ -357,7 +357,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
/* bits 36:32 -- register */
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
fields[1].out_value[0] = reg_addr;
field1_out[0] = reg_addr;
fields[1].in_value = NULL;
fields[1].check_value = NULL;
fields[1].check_mask = NULL;
@ -365,7 +365,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
/* bit 37 -- 0/read */
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
fields[2].out_value[0] = 0;
field2_out[0] = 0;
fields[2].in_value = NULL;
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
@ -382,7 +382,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
* EICE_COMMS_DATA would read the register twice
* reading the control register is safe
*/
fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
field1_out[0] = eice_regs[EICE_COMMS_CTRL].addr;
/* traverse Update-DR, reading but with no other side effects */
jtag_add_dr_scan_check(ice_reg->jtag_info->tap, 3, fields, TAP_IDLE);
@ -413,12 +413,12 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
field1_out[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
fields[2].out_value[0] = 0;
field2_out[0] = 0;
fields[2].in_value = NULL;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
@ -429,7 +429,7 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz
* to avoid reading additional data from the DCC data reg
*/
if (size == 1)
fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
field1_out[0] = eice_regs[EICE_COMMS_CTRL].addr;
fields[0].in_value = (uint8_t *)data;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
@ -529,18 +529,18 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
field1_out[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
fields[2].out_value[0] = 1;
field2_out[0] = 1;
fields[2].in_value = NULL;
while (size > 0)
{
buf_set_u32(fields[0].out_value, 0, 32, *data);
buf_set_u32(field0_out, 0, 32, *data);
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
data++;
@ -581,12 +581,12 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
field1_out[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
fields[2].out_value[0] = 0;
field2_out[0] = 0;
fields[2].in_value = NULL;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);

68
src/target/etb.c
View File

@ -55,14 +55,15 @@ static int etb_set_instr(struct etb *etb, uint32_t new_instr)
struct scan_field field;
field.num_bits = tap->ir_length;
field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
void * t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
field.out_value = t;
buf_set_u32(t, 0, field.num_bits, new_instr);
field.in_value = NULL;
jtag_add_ir_scan(tap, &field, TAP_IDLE);
free(field.out_value);
free(t);
}
return ERROR_OK;
@ -75,8 +76,9 @@ static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
struct scan_field field;
field.num_bits = 5;
field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
void * t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
field.out_value = t;
buf_set_u32(t, 0, field.num_bits, new_scan_chain);
field.in_value = NULL;
@ -86,7 +88,7 @@ static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
etb->cur_scan_chain = new_scan_chain;
free(field.out_value);
free(t);
}
return ERROR_OK;
@ -181,13 +183,15 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
fields[0].in_value = NULL;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, 4);
uint8_t temp1;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, 4);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
uint8_t temp2;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
jtag_add_dr_scan(etb->tap, 3, fields, TAP_IDLE);
@ -195,13 +199,13 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
for (i = 0; i < num_frames; i++)
{
/* ensure nR/W reamins set to read */
buf_set_u32(fields[2].out_value, 0, 1, 0);
buf_set_u32(&temp2, 0, 1, 0);
/* address remains set to 0x4 (RAM data) until we read the last frame */
if (i < num_frames - 1)
buf_set_u32(fields[1].out_value, 0, 7, 4);
buf_set_u32(&temp1, 0, 7, 4);
else
buf_set_u32(fields[1].out_value, 0, 7, 0);
buf_set_u32(&temp1, 0, 7, 0);
fields[0].in_value = (uint8_t *)(data + i);
jtag_add_dr_scan(etb->tap, 3, fields, TAP_IDLE);
@ -211,9 +215,6 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
jtag_execute_queue();
free(fields[1].out_value);
free(fields[2].out_value);
return ERROR_OK;
}
@ -236,15 +237,17 @@ static int etb_read_reg_w_check(struct reg *reg,
fields[0].check_mask = NULL;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
uint8_t temp1;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[1].check_value = NULL;
fields[1].check_mask = NULL;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
uint8_t temp2;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
@ -254,16 +257,13 @@ static int etb_read_reg_w_check(struct reg *reg,
/* read the identification register in the second run, to make sure we
* don't read the ETB data register twice, skipping every second entry
*/
buf_set_u32(fields[1].out_value, 0, 7, 0x0);
buf_set_u32(&temp1, 0, 7, 0x0);
fields[0].in_value = reg->value;
fields[0].check_value = check_value;
fields[0].check_mask = check_mask;
jtag_add_dr_scan_check(etb_reg->etb->tap, 3, fields, TAP_IDLE);
free(fields[1].out_value);
free(fields[2].out_value);
return ERROR_OK;
}
@ -312,25 +312,23 @@ static int etb_write_reg(struct reg *reg, uint32_t value)
etb_set_instr(etb_reg->etb, 0xc);
fields[0].num_bits = 32;
fields[0].out_value = malloc(4);
buf_set_u32(fields[0].out_value, 0, 32, value);
uint8_t temp0[4];
fields[0].out_value = temp0;
buf_set_u32(&temp0, 0, 32, value);
fields[0].in_value = NULL;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
uint8_t temp1;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 1);
uint8_t temp2;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 1);
fields[2].in_value = NULL;
free(fields[0].out_value);
free(fields[1].out_value);
free(fields[2].out_value);
return ERROR_OK;
}

19
src/target/etm.c
View File

@ -514,15 +514,17 @@ static int etm_read_reg_w_check(struct reg *reg,
fields[0].check_mask = NULL;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
uint8_t temp1;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[1].check_value = NULL;
fields[1].check_mask = NULL;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
uint8_t temp2;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
@ -535,9 +537,6 @@ static int etm_read_reg_w_check(struct reg *reg,
jtag_add_dr_scan_check(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
free(fields[1].out_value);
free(fields[2].out_value);
return ERROR_OK;
}
@ -592,19 +591,19 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
fields[0].num_bits = 32;
uint8_t tmp1[4];
fields[0].out_value = tmp1;
buf_set_u32(fields[0].out_value, 0, 32, value);
buf_set_u32(tmp1, 0, 32, value);
fields[0].in_value = NULL;
fields[1].num_bits = 7;
uint8_t tmp2;
fields[1].out_value = &tmp2;
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
buf_set_u32(&tmp2, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
uint8_t tmp3;
fields[2].out_value = &tmp3;
buf_set_u32(fields[2].out_value, 0, 1, 1);
buf_set_u32(&tmp3, 0, 1, 1);
fields[2].in_value = NULL;
jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);