Clear sbcs.sbbusyerror without affecting other sbcs bits (#547)
This is a fix for an issue reported by Joe Stoy at: https://sourceforge.net/p/openocd/mailman/message/37128537/ When clearing sbcs.sbbusyerror, preserve other bits in the sbcs register that are needed for subsequent system bus transactions.
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@ -2192,7 +2192,7 @@ static int sample_memory_bus_v1(struct target *target,
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/* Discard this batch (too much hassle to try to recover partial
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* data) and try again with a larger delay. */
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info->bus_master_read_delay += info->bus_master_read_delay / 10 + 1;
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dmi_write(target, DM_SBCS, DM_SBCS_SBBUSYERROR | DM_SBCS_SBERROR);
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dmi_write(target, DM_SBCS, sbcs_read | DM_SBCS_SBBUSYERROR | DM_SBCS_SBERROR);
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riscv_batch_free(batch);
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continue;
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}
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@ -2778,7 +2778,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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if (get_field(sbcs_read, DM_SBCS_SBBUSYERROR)) {
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/* We read while the target was busy. Slow down and try again. */
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if (dmi_write(target, DM_SBCS, DM_SBCS_SBBUSYERROR) != ERROR_OK)
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if (dmi_write(target, DM_SBCS, sbcs_read | DM_SBCS_SBBUSYERROR) != ERROR_OK)
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return ERROR_FAIL;
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next_address = sb_read_address(target);
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info->bus_master_read_delay += info->bus_master_read_delay / 10 + 1;
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@ -3726,7 +3726,7 @@ static int write_memory_bus_v1(struct target *target, target_addr_t address,
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if (get_field(sbcs, DM_SBCS_SBBUSYERROR)) {
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/* We wrote while the target was busy. Slow down and try again. */
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dmi_write(target, DM_SBCS, DM_SBCS_SBBUSYERROR);
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dmi_write(target, DM_SBCS, sbcs | DM_SBCS_SBBUSYERROR);
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info->bus_master_write_delay += info->bus_master_write_delay / 10 + 1;
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}
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