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AM/DM37x: Use ICEPick warm reset and include halt when gdb connects. 

Using the ICEPick reset seems to allow the processor to be halted sooner
and the halt on gdb connection makes the connect process more robust.

Change-Id: I0586f6e6becc60a729030509ef58907a19d545ec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/23
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This commit is contained in:
Karl Kurbjun 2011-10-02 11:41:33 -06:00 committed by Øyvind Harboe
parent 70143a96c5
commit 59beb93752
1 changed files with 28 additions and 19 deletions
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37
tcl/target/amdm37x.cfg
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@ -1,5 +1,5 @@
# #
# Copyright (C) 2010 by Karl Kurbjun # Copyright (C) 2010-2011 by Karl Kurbjun
# Copyright (C) 2009-2011 by Øyvind Harboe # Copyright (C) 2009-2011 by Øyvind Harboe
# Copyright (C) 2009 by David Brownell # Copyright (C) 2009 by David Brownell
# Copyright (C) 2009 by Magnus Lundin # Copyright (C) 2009 by Magnus Lundin
@ -158,25 +158,34 @@ $_TARGETNAME configure -work-area-phys 0x40200000 -work-area-size 0x4000
$_TARGETNAME configure -event "reset-start" { adapter_khz 10 } $_TARGETNAME configure -event "reset-start" { adapter_khz 10 }
# Reset needs to be performed in in software. # Describe the reset assert process for openocd - this is asserted with the
# The AM/DM37x TRM (sprugn4b) describes the software reset in detail. # ICEPick
# PRM_RSTCTRL is described in table 3-425 on page 618. We assert RST_GS $_TARGETNAME configure -event "reset-assert" {
# (bit 1 (in 31:0) ) to do a warm reset.
# Create a vaiable for the register address global _CHIPNAME
set PRM_RSTCTRL 0x48307250
# Describe the reset assert process: A value of 2 must be written # assert warm system reset through ICEPick
# (assert bit 1) to the physical address of PRM_RSTCTRL. icepick_c_wreset $_CHIPNAME.jrc
}
$_TARGETNAME configure -event \
reset-assert "$_TARGETNAME mww phys $PRM_RSTCTRL 2"
# After the reset is asserted we need to re-initialize debugging and speed up # After the reset is asserted we need to re-initialize debugging and speed up
# the JTAG clock. # the JTAG clock.
$_TARGETNAME configure -event \ $_TARGETNAME configure -event reset-assert-post {
reset-assert-post "amdm37x_dbginit $_TARGETNAME; adapter_khz 1000"
global _TARGETNAME
amdm37x_dbginit $_TARGETNAME
adapter_khz 1000
}
$_TARGETNAME configure -event gdb-attach {
global _TARGETNAME
amdm37x_dbginit $_TARGETNAME
echo "Halting target"
halt
}
###### ######
# End Target Reset Event Setup: # End Target Reset Event Setup: