mips: support connecting under reset
Some targets support connecting while the target's srst is asserted. Tested on pic32 family. Change-Id: I0d20c40af6d031d1306043893e95e61f484c0a87 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/608 Tested-by: jenkins
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@ -222,15 +222,22 @@ static int mips_m4k_assert_reset(struct target *target)
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{
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struct mips_m4k_common *mips_m4k = target_to_m4k(target);
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struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
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int assert_srst = 1;
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LOG_DEBUG("target->state: %s",
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target_state_name(target));
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enum reset_types jtag_reset_config = jtag_get_reset_config();
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if (!(jtag_reset_config & RESET_HAS_SRST))
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assert_srst = 0;
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/* some cores support connecting while srst is asserted
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* use that mode is it has been configured */
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bool srst_asserted = false;
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if (!(jtag_reset_config & RESET_SRST_PULLS_TRST) &&
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(jtag_reset_config & RESET_SRST_NO_GATING)) {
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jtag_add_reset(0, 1);
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srst_asserted = true;
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}
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if (target->reset_halt) {
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/* use hardware to catch reset */
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@ -238,11 +245,11 @@ static int mips_m4k_assert_reset(struct target *target)
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} else
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT);
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if (assert_srst) {
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if (jtag_reset_config & RESET_HAS_SRST) {
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/* here we should issue a srst only, but we may have to assert trst as well */
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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jtag_add_reset(1, 1);
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else
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else if (!srst_asserted)
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jtag_add_reset(0, 1);
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} else {
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if (mips_m4k->is_pic32mx) {
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