- added the patch CFI-BE-Fixes-Blockwrite-Support.diff
(thanks to Carsten Schlote for the patch) git-svn-id: svn://svn.berlios.de/openocd/trunk@231 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
mifi
parent
7ff3a0d12e
commit
55bdadcbcd
340
src/flash/cfi.c
340
src/flash/cfi.c
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@ -52,6 +52,9 @@ int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, cha
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#define CFI_MAX_BUS_WIDTH 4
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#define CFI_MAX_CHIP_WIDTH 4
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/* defines internal maximum size for code fragment in cfi_intel_write_block() */
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#define CFI_MAX_INTEL_CODESIZE 256
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flash_driver_t cfi_flash =
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{
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.name = "cfi",
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@ -834,18 +837,20 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
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{
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for (i = 0; i < bank->num_sectors; i++)
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{
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cfi_intel_clear_status_register(bank);
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cfi_command(bank, 0x60, command);
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target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
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if (bank->sectors[i].is_protected == 1)
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{
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cfi_intel_clear_status_register(bank);
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cfi_command(bank, 0x60, command);
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target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
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cfi_command(bank, 0x01, command);
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target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
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}
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cfi_intel_wait_status_busy(bank, 100);
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}
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}
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}
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cfi_command(bank, 0xff, command);
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target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
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@ -884,25 +889,45 @@ int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
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return ERROR_OK;
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}
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void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte)
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/* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */
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static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte)
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{
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target_t *target = bank->target;
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int i;
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if (target->endianness == TARGET_LITTLE_ENDIAN)
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{
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// NOTE:
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// The data to flash must not be changed in endian! We write a bytestrem in
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// target byte order already. Only the control and status byte lane of the flash
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// WSM is interpreted by the CPU in different ways, when read a u16 or u32
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// word (data seems to be in the upper or lower byte lane for u16 accesses).
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//if (target->endianness == TARGET_LITTLE_ENDIAN)
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//{
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/* shift bytes */
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for (i = 0; i < bank->bus_width - 1; i++)
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word[i] = word[i + 1];
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word[bank->bus_width - 1] = byte;
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//}
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//else
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//{
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// /* shift bytes */
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// for (i = bank->bus_width - 1; i > 0; i--)
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// word[i] = word[i - 1];
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// word[0] = byte;
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//}
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}
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else
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/* Convert code image to target endian */
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/* FIXME create general block conversion fcts in target.c?) */ static
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void cfi_fix_code_endian(target_t *target, u32 *dest, const u32 *src, u32 count)
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{
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/* shift bytes */
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for (i = bank->bus_width - 1; i > 0; i--)
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word[i] = word[i - 1];
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word[0] = byte;
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u32 i;
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for (i=0; i< count; i++)
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{
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target_buffer_set_u32(target, (u8*)dest, *src);
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dest++;
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src++;
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}
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}
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@ -918,7 +943,6 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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u8 busy_pattern_buf[CFI_MAX_BUS_WIDTH];
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u8 error_pattern_buf[CFI_MAX_BUS_WIDTH];
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u32 write_command_val, busy_pattern_val, error_pattern_val;
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int retval;
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/* algorithm register usage:
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* r0: source address (in RAM)
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@ -944,7 +968,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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0x0a000001, /* beq done */
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0xe2811004, /* add r1, r1 #4 */
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0xeafffff2, /* b loop */
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0xeafffffe, /* done: b -2 */
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0xeafffffe /* done: b -2 */
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};
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static const u32 word_16_code[] = {
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@ -961,7 +985,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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0x0a000001, /* beq done */
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0xe2811002, /* add r1, r1 #2 */
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0xeafffff2, /* b loop */
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0xeafffffe, /* done: b -2 */
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0xeafffffe /* done: b -2 */
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};
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static const u32 word_8_code[] = {
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@ -978,8 +1002,13 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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0x0a000001, /* beq done */
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0xe2811001, /* add r1, r1 #1 */
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0xeafffff2, /* b loop */
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0xeafffffe, /* done: b -2 */
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0xeafffffe /* done: b -2 */
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};
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u32 target_code[CFI_MAX_INTEL_CODESIZE];
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const u32 *target_code_src;
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int target_code_size;
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int retval = ERROR_OK;
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cfi_intel_clear_status_register(bank);
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@ -990,53 +1019,64 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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/* flash write code */
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if (!cfi_info->write_algorithm)
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{
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u8 write_code_buf[14 * 4];
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int i;
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if (target_alloc_working_area(target, 4 * 14, &cfi_info->write_algorithm) != ERROR_OK)
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/* prepare algorithm code for target endian */
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switch (bank->bus_width)
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{
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WARNING("no working area available, can't do block memory writes");
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case 1 :
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target_code_src = word_8_code;
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target_code_size = sizeof(word_8_code);
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break;
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case 2 :
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target_code_src = word_16_code;
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target_code_size = sizeof(word_16_code);
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break;
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case 4 :
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target_code_src = word_32_code;
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target_code_size = sizeof(word_32_code);
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break;
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default:
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ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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if ( target_code_size > sizeof(target_code) )
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{
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WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile.");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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cfi_fix_code_endian(target, target_code, target_code_src, target_code_size);
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/* Get memory for block write handler */
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retval = target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm);
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if (retval != ERROR_OK)
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{
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WARNING("No working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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/* write algorithm code to working area */
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if (bank->bus_width == 1)
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retval = target_write_buffer(target, cfi_info->write_algorithm->address, target_code_size, (u8*)target_code);
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if (retval != ERROR_OK)
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{
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for (i = 0; i < 14; i++)
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target_buffer_set_u32(target, write_code_buf + (i*4), word_8_code[i]);
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ERROR("Unable to write block write code to target");
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goto cleanup;
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}
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else if (bank->bus_width == 2)
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{
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for (i = 0; i < 14; i++)
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target_buffer_set_u32(target, write_code_buf + (i*4), word_16_code[i]);
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}
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else if (bank->bus_width == 4)
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{
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for (i = 0; i < 14; i++)
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target_buffer_set_u32(target, write_code_buf + (i*4), word_32_code[i]);
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}
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else
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{
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return ERROR_FLASH_OPERATION_FAILED;
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}
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target_write_buffer(target, cfi_info->write_algorithm->address, 14 * 4, write_code_buf);
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}
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/* Get a workspace buffer for the data to flash starting with 32k size.
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Half size until buffer would be smaller 256 Bytem then fail back */
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/* FIXME Why 256 bytes, why not 32 bytes (smallest flash write page */
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
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{
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buffer_size /= 2;
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if (buffer_size <= 256)
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{
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/* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
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if (cfi_info->write_algorithm)
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target_free_working_area(target, cfi_info->write_algorithm);
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WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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goto cleanup;
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}
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};
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/* setup algo registers */
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
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init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
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@ -1050,50 +1090,77 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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cfi_command(bank, 0x80, busy_pattern_buf);
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cfi_command(bank, 0x7e, error_pattern_buf);
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if (bank->bus_width == 1)
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switch (bank->bus_width)
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{
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case 1 :
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write_command_val = write_command_buf[0];
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busy_pattern_val = busy_pattern_buf[0];
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error_pattern_val = error_pattern_buf[0];
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}
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else if (bank->bus_width == 2)
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{
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break;
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case 2 :
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write_command_val = target_buffer_get_u16(target, write_command_buf);
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busy_pattern_val = target_buffer_get_u16(target, busy_pattern_buf);
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error_pattern_val = target_buffer_get_u16(target, error_pattern_buf);
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}
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else if (bank->bus_width == 4)
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{
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break;
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case 4 :
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write_command_val = target_buffer_get_u32(target, write_command_buf);
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busy_pattern_val = target_buffer_get_u32(target, busy_pattern_buf);
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error_pattern_val = target_buffer_get_u32(target, error_pattern_buf);
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break;
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default :
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ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
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retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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goto cleanup;
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}
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INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size );
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/* Programming main loop */
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while (count > 0)
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{
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u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
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u32 wsm_error;
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target_write_buffer(target, source->address, thisrun_count, buffer);
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buf_set_u32(reg_params[0].value, 0, 32, source->address);
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buf_set_u32(reg_params[1].value, 0, 32, address);
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buf_set_u32(reg_params[2].value, 0, 32, thisrun_count / bank->bus_width);
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buf_set_u32(reg_params[3].value, 0, 32, write_command_val);
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buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val);
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buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val);
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if ((retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params, cfi_info->write_algorithm->address, cfi_info->write_algorithm->address + (13 * 4), 10000, &armv4_5_info)) != ERROR_OK)
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INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address );
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/* Execute algorithm, assume breakpoint for last instruction */
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retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params,
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cfi_info->write_algorithm->address,
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cfi_info->write_algorithm->address + target_code_size - sizeof(u32),
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10000, /* 10s should be enough for max. 32k of data */
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&armv4_5_info);
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/* On failure try a fall back to direct word writes */
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if (retval != ERROR_OK)
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{
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cfi_intel_clear_status_register(bank);
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return ERROR_FLASH_OPERATION_FAILED;
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ERROR("Execution of flash algorythm failed. Can't fall back. Please report.");
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retval = ERROR_FLASH_OPERATION_FAILED;
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//retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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// FIXME To allow fall back or recovery, we must save the actual status
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// somewhere, so that a higher level code can start recovery.
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goto cleanup;
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}
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if (buf_get_u32(reg_params[4].value, 0, 32) & error_pattern_val)
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/* Check return value from algo code */
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wsm_error = buf_get_u32(reg_params[4].value, 0, 32) & error_pattern_val;
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if (wsm_error)
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{
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/* read status register (outputs debug inforation) */
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cfi_intel_wait_status_busy(bank, 100);
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cfi_intel_clear_status_register(bank);
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return ERROR_FLASH_OPERATION_FAILED;
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retval = ERROR_FLASH_OPERATION_FAILED;
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goto cleanup;
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}
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buffer += thisrun_count;
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@ -1101,8 +1168,17 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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count -= thisrun_count;
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}
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/* free up resources */
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cleanup:
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if (source)
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target_free_working_area(target, source);
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if (cfi_info->write_algorithm)
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{
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target_free_working_area(target, cfi_info->write_algorithm);
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cfi_info->write_algorithm = NULL;
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}
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destroy_reg_param(®_params[0]);
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destroy_reg_param(®_params[1]);
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destroy_reg_param(®_params[2]);
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@ -1111,7 +1187,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
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destroy_reg_param(®_params[5]);
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destroy_reg_param(®_params[6]);
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return ERROR_OK;
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return retval;
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}
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int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
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@ -1400,6 +1476,77 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
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return ERROR_OK;
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}
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int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
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{
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cfi_flash_bank_t *cfi_info = bank->driver_priv;
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target_t *target = bank->target;
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u8 command[8];
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int i;
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/* Calculate buffer size and boundary mask */
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u32 buffersize = 1UL << cfi_info->max_buf_write_size;
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u32 buffermask = buffersize-1;
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u32 bufferwsize;
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/* Check for valid range */
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if (address & buffermask)
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{
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ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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switch(bank->chip_width)
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{
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case 4 : bufferwsize = buffersize / 4; break;
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case 2 : bufferwsize = buffersize / 2; break;
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case 1 : bufferwsize = buffersize; break;
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default:
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ERROR("Unsupported chip width %d", bank->chip_width);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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/* Check for valid size */
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if (wordcount > bufferwsize)
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{
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ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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/* Write to flash buffer */
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cfi_intel_clear_status_register(bank);
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/* Initiate buffer operation _*/
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cfi_command(bank, 0xE8, command);
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target->type->write_memory(target, address, bank->bus_width, 1, command);
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if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
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{
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cfi_command(bank, 0xff, command);
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target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
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ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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/* Write buffer wordcount-1 and data words */
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cfi_command(bank, bufferwsize-1, command);
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target->type->write_memory(target, address, bank->bus_width, 1, command);
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target->type->write_memory(target, address, bank->bus_width, bufferwsize, word);
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/* Commit write operation */
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cfi_command(bank, 0xd0, command);
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target->type->write_memory(target, address, bank->bus_width, 1, command);
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if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
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{
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cfi_command(bank, 0xff, command);
|
||||
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
|
||||
|
||||
ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address);
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
|
||||
{
|
||||
cfi_flash_bank_t *cfi_info = bank->driver_priv;
|
||||
|
|
@ -1451,6 +1598,28 @@ int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
|
|||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
|
||||
int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
|
||||
{
|
||||
cfi_flash_bank_t *cfi_info = bank->driver_priv;
|
||||
|
||||
switch(cfi_info->pri_id)
|
||||
{
|
||||
case 1:
|
||||
case 3:
|
||||
return cfi_intel_write_words(bank, word, wordcount, address);
|
||||
break;
|
||||
case 2:
|
||||
//return cfi_spansion_write_words(bank, word, address);
|
||||
ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id);
|
||||
break;
|
||||
default:
|
||||
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
|
||||
break;
|
||||
}
|
||||
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
|
||||
int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
|
||||
{
|
||||
cfi_flash_bank_t *cfi_info = bank->driver_priv;
|
||||
|
|
@ -1458,6 +1627,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
|
|||
u32 address = bank->base + offset; /* address of first byte to be programmed */
|
||||
u32 write_p, copy_p;
|
||||
int align; /* number of unaligned bytes */
|
||||
int blk_count; /* number of bus_width bytes for block copy */
|
||||
u8 current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */
|
||||
int i;
|
||||
int retval;
|
||||
|
|
@ -1477,6 +1647,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
|
|||
write_p = address & ~(bank->bus_width - 1);
|
||||
if ((align = address - write_p) != 0)
|
||||
{
|
||||
INFO("Fixup %d unaligned head bytes", align );
|
||||
|
||||
for (i = 0; i < bank->bus_width; i++)
|
||||
current_word[i] = 0;
|
||||
copy_p = write_p;
|
||||
|
|
@ -1512,27 +1684,65 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
|
|||
}
|
||||
|
||||
/* handle blocks of bus_size aligned bytes */
|
||||
blk_count = count & ~(bank->bus_width - 1); /* round down, leave tail bytes */
|
||||
switch(cfi_info->pri_id)
|
||||
{
|
||||
/* try block writes (fails without working area) */
|
||||
case 1:
|
||||
case 3:
|
||||
retval = cfi_intel_write_block(bank, buffer, write_p, count);
|
||||
retval = cfi_intel_write_block(bank, buffer, write_p, blk_count);
|
||||
break;
|
||||
case 2:
|
||||
retval = cfi_spansion_write_block(bank, buffer, write_p, count);
|
||||
retval = cfi_spansion_write_block(bank, buffer, write_p, blk_count);
|
||||
break;
|
||||
default:
|
||||
ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
|
||||
retval = ERROR_FLASH_OPERATION_FAILED;
|
||||
break;
|
||||
}
|
||||
if (retval != ERROR_OK)
|
||||
if (retval == ERROR_OK)
|
||||
{
|
||||
/* Increment pointers and decrease count on succesful block write */
|
||||
buffer += blk_count;
|
||||
write_p += blk_count;
|
||||
count -= blk_count;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
|
||||
{
|
||||
u32 buffersize = 1UL << cfi_info->max_buf_write_size;
|
||||
u32 buffermask = buffersize-1;
|
||||
u32 bufferwsize;
|
||||
|
||||
switch(bank->chip_width)
|
||||
{
|
||||
case 4 : bufferwsize = buffersize / 4; break;
|
||||
case 2 : bufferwsize = buffersize / 2; break;
|
||||
case 1 : bufferwsize = buffersize; break;
|
||||
default:
|
||||
ERROR("Unsupported chip width %d", bank->chip_width);
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
|
||||
/* fall back to memory writes */
|
||||
while (count > bank->bus_width)
|
||||
{
|
||||
if ((write_p & 0xff) == 0)
|
||||
{
|
||||
INFO("Programming at %08x, count %08x bytes remaining", write_p, count);
|
||||
}
|
||||
if ((count > bufferwsize) && !(write_p & buffermask))
|
||||
{
|
||||
retval = cfi_write_words(bank, buffer, bufferwsize, write_p);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
buffer += buffersize;
|
||||
write_p += buffersize;
|
||||
count -= buffersize;
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i = 0; i < bank->bus_width; i++)
|
||||
current_word[i] = 0;
|
||||
|
|
@ -1545,17 +1755,27 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
|
|||
retval = cfi_write_word(bank, current_word, write_p);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
write_p += bank->bus_width;
|
||||
count -= bank->bus_width;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* return to read array mode, so we can read from flash again for padding */
|
||||
cfi_command(bank, 0xf0, current_word);
|
||||
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
|
||||
cfi_command(bank, 0xff, current_word);
|
||||
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
|
||||
|
||||
/* handle unaligned tail bytes */
|
||||
if (count > 0)
|
||||
{
|
||||
INFO("Fixup %d unaligned tail bytes", count );
|
||||
|
||||
copy_p = write_p;
|
||||
for (i = 0; i < bank->bus_width; i++)
|
||||
current_word[i] = 0;
|
||||
|
|
|
|||
Loading…
Reference in New Issue