- added run_and_halt_time to deprecated/removed functions section
git-svn-id: svn://svn.berlios.de/openocd/trunk@880 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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ntfreak
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@ -1434,6 +1434,15 @@ use @option{flash write_image} command passing @option{erase} as the first param
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this config option has been removed, simply adding @option{init} and @option{reset halt} to
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the end of your config script will give the same behaviour as using @option{daemon_startup reset}
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and @option{target cortex_m3 little reset_halt 0}.
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@item @b{run_and_halt_time}
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@cindex run_and_halt_time
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This command has been removed for simpler reset behaviour, it can be simulated with the
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following commands:
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@smallexample
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reset run
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sleep 100
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halt
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@end smallexample
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@end itemize
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@node FAQ
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@ -1,76 +1,76 @@
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Some outstanding issues w.r.t. non-ARM32 targets
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================================================
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This file describes outstanding issues w.r.t.
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non-ARM32 targets.
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Ideas & patches welcome!
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Flash drivers
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-------------
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The flash drivers contain ARM32 code that is used
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to execute code on the target.
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This needs to be handled in some CPU independent
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manner.
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The ocl and ecos flash drivers compile the flash
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driver code to run on the target on the developer
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machine.
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The ocl and ecos flash drivers should be unified
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and instructions should be written on how to
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compile the target flash drivers. Perhaps
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using automake?
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eCos has CFI driver that could probably be compiled
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for all targets. The trick is to figure out a
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way to make the compiled flash drivers work
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on all target memory maps + sort out all the
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little details
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32 vs. 64 bit
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-------------
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Currently OpenOCD only supports 32 bit targets.
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Adding 64 bit support would be nice but there
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hasn't been any call for it in the openocd development
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mailing list
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target support
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--------------
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target.h is relatively CPU agnostic and
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the intention is to move in the direction of less
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instruction set specific.
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Non-CPU targets are also supported, but there isn't
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a lot of activity on it in the mailing list currently.
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An example is FPGA programming support via JTAG,
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but also flash chips can be programmed directly
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using JTAG.
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non-JTAG physical layer
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-----------------------
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JTAG is not the only physical protocol used to talk to
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CPUs.
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OpenOCD does not today have targets that use non-JTAG.
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The actual physical layer is a relatively modest part
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of the total OpenOCD system.
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PowerPC
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-------
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there exists open source implementations of powerpc
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target manipulation, but there hasn't been a lot
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of activity in the mailing list.
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MIPS
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----
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Currently OpenOCD has a MIPS target defined. This is the
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Some outstanding issues w.r.t. non-ARM32 targets
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================================================
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This file describes outstanding issues w.r.t.
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non-ARM32 targets.
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Ideas & patches welcome!
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Flash drivers
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-------------
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The flash drivers contain ARM32 code that is used
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to execute code on the target.
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This needs to be handled in some CPU independent
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manner.
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The ocl and ecos flash drivers compile the flash
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driver code to run on the target on the developer
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machine.
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The ocl and ecos flash drivers should be unified
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and instructions should be written on how to
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compile the target flash drivers. Perhaps
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using automake?
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eCos has CFI driver that could probably be compiled
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for all targets. The trick is to figure out a
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way to make the compiled flash drivers work
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on all target memory maps + sort out all the
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little details
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32 vs. 64 bit
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-------------
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Currently OpenOCD only supports 32 bit targets.
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Adding 64 bit support would be nice but there
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hasn't been any call for it in the openocd development
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mailing list
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target support
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--------------
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target.h is relatively CPU agnostic and
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the intention is to move in the direction of less
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instruction set specific.
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Non-CPU targets are also supported, but there isn't
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a lot of activity on it in the mailing list currently.
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An example is FPGA programming support via JTAG,
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but also flash chips can be programmed directly
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using JTAG.
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non-JTAG physical layer
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-----------------------
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JTAG is not the only physical protocol used to talk to
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CPUs.
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OpenOCD does not today have targets that use non-JTAG.
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The actual physical layer is a relatively modest part
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of the total OpenOCD system.
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PowerPC
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-------
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there exists open source implementations of powerpc
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target manipulation, but there hasn't been a lot
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of activity in the mailing list.
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MIPS
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----
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Currently OpenOCD has a MIPS target defined. This is the
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first non-ARM example of a CPU target
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