FLASH/NOR: Remove useless file at91sam7.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
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d213e1a12c
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52558354e6
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@ -33,7 +33,6 @@ NOR_DRIVERS = \
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virtual.c
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virtual.c
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noinst_HEADERS = \
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noinst_HEADERS = \
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at91sam7.h \
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avrf.h \
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avrf.h \
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core.h \
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core.h \
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cfi.h \
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cfi.h \
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@ -50,9 +50,55 @@
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#endif
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#endif
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#include "imp.h"
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#include "imp.h"
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#include "at91sam7.h"
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#include <helper/binarybuffer.h>
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#include <helper/binarybuffer.h>
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/* AT91SAM7 control registers */
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#define DBGU_CIDR 0xFFFFF240
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#define CKGR_MCFR 0xFFFFFC24
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#define CKGR_MOR 0xFFFFFC20
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#define CKGR_MCFR_MAINRDY 0x10000
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#define CKGR_PLLR 0xFFFFFC2c
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#define CKGR_PLLR_DIV 0xff
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#define CKGR_PLLR_MUL 0x07ff0000
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#define PMC_MCKR 0xFFFFFC30
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#define PMC_MCKR_CSS 0x03
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#define PMC_MCKR_PRES 0x1c
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/* Flash Controller Commands */
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#define WP 0x01
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#define SLB 0x02
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#define WPL 0x03
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#define CLB 0x04
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#define EA 0x08
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#define SGPB 0x0B
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#define CGPB 0x0D
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#define SSB 0x0F
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/* MC_FSR bit definitions */
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#define MC_FSR_FRDY 1
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#define MC_FSR_EOL 2
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/* AT91SAM7 constants */
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#define RC_FREQ 32000
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/* Flash timing modes */
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#define FMR_TIMING_NONE 0
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#define FMR_TIMING_NVBITS 1
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#define FMR_TIMING_FLASH 2
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/* Flash size constants */
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#define FLASH_SIZE_8KB 1
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#define FLASH_SIZE_16KB 2
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#define FLASH_SIZE_32KB 3
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#define FLASH_SIZE_64KB 5
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#define FLASH_SIZE_128KB 7
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#define FLASH_SIZE_256KB 9
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#define FLASH_SIZE_512KB 10
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#define FLASH_SIZE_1024KB 12
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#define FLASH_SIZE_2048KB 14
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static int at91sam7_protect_check(struct flash_bank *bank);
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static int at91sam7_protect_check(struct flash_bank *bank);
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static int at91sam7_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
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static int at91sam7_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
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@ -67,6 +113,50 @@ static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
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static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
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static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
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struct at91sam7_flash_bank
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{
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/* chip id register */
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uint32_t cidr;
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uint16_t cidr_ext;
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uint16_t cidr_nvptyp;
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uint16_t cidr_arch;
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uint16_t cidr_sramsiz;
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uint16_t cidr_nvpsiz;
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uint16_t cidr_nvpsiz2;
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uint16_t cidr_eproc;
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uint16_t cidr_version;
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char *target_name;
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/* flash auto-detection */
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uint8_t flash_autodetection;
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/* flash geometry */
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uint16_t pages_per_sector;
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uint16_t pagesize;
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uint16_t pages_in_lockregion;
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/* nv memory bits */
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uint16_t num_lockbits_on;
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uint16_t lockbits;
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uint16_t num_nvmbits;
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uint16_t num_nvmbits_on;
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uint16_t nvmbits;
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uint8_t securitybit;
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/* 0: not init
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* 1: fmcn for nvbits (1uS)
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* 2: fmcn for flash (1.5uS) */
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uint8_t flashmode;
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/* main clock status */
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uint8_t mck_valid;
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uint32_t mck_freq;
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/* external clock frequency */
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uint32_t ext_freq;
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};
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#if 0
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#if 0
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static long SRAMSIZ[16] = {
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static long SRAMSIZ[16] = {
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-1,
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-1,
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@ -1,116 +0,0 @@
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/***************************************************************************
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* Copyright (C) 2006 by Magnus Lundin *
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* lundin@mlu.mine.nu *
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* *
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* Copyright (C) 2006 by Gheorghe Guran (atlas) *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifndef AT91SAM7_H
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#define AT91SAM7_H
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struct at91sam7_flash_bank
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{
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/* chip id register */
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uint32_t cidr;
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uint16_t cidr_ext;
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uint16_t cidr_nvptyp;
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uint16_t cidr_arch;
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uint16_t cidr_sramsiz;
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uint16_t cidr_nvpsiz;
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uint16_t cidr_nvpsiz2;
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uint16_t cidr_eproc;
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uint16_t cidr_version;
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char *target_name;
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/* flash auto-detection */
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uint8_t flash_autodetection;
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/* flash geometry */
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uint16_t pages_per_sector;
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uint16_t pagesize;
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uint16_t pages_in_lockregion;
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/* nv memory bits */
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uint16_t num_lockbits_on;
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uint16_t lockbits;
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uint16_t num_nvmbits;
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uint16_t num_nvmbits_on;
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uint16_t nvmbits;
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uint8_t securitybit;
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/* 0: not init
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* 1: fmcn for nvbits (1uS)
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* 2: fmcn for flash (1.5uS) */
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uint8_t flashmode;
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/* main clock status */
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uint8_t mck_valid;
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uint32_t mck_freq;
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/* external clock frequency */
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uint32_t ext_freq;
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};
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/* AT91SAM7 control registers */
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#define DBGU_CIDR 0xFFFFF240
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#define CKGR_MCFR 0xFFFFFC24
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#define CKGR_MOR 0xFFFFFC20
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#define CKGR_MCFR_MAINRDY 0x10000
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#define CKGR_PLLR 0xFFFFFC2c
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#define CKGR_PLLR_DIV 0xff
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#define CKGR_PLLR_MUL 0x07ff0000
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#define PMC_MCKR 0xFFFFFC30
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#define PMC_MCKR_CSS 0x03
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#define PMC_MCKR_PRES 0x1c
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/* Flash Controller Commands */
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#define WP 0x01
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#define SLB 0x02
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#define WPL 0x03
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#define CLB 0x04
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#define EA 0x08
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#define SGPB 0x0B
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#define CGPB 0x0D
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#define SSB 0x0F
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/* MC_FSR bit definitions */
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#define MC_FSR_FRDY 1
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#define MC_FSR_EOL 2
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/* AT91SAM7 constants */
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#define RC_FREQ 32000
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/* Flash timing modes */
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#define FMR_TIMING_NONE 0
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#define FMR_TIMING_NVBITS 1
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#define FMR_TIMING_FLASH 2
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/* Flash size constants */
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#define FLASH_SIZE_8KB 1
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#define FLASH_SIZE_16KB 2
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#define FLASH_SIZE_32KB 3
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#define FLASH_SIZE_64KB 5
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#define FLASH_SIZE_128KB 7
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#define FLASH_SIZE_256KB 9
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#define FLASH_SIZE_512KB 10
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#define FLASH_SIZE_1024KB 12
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#define FLASH_SIZE_2048KB 14
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#endif /* AT91SAM7_H */
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