mips: fix some more endian madness
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4da551732e
commit
524d79ebe7
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@ -559,6 +559,13 @@ int mips32_configure_break_unit(struct target *target)
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return retval;
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return retval;
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}
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}
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/* check if target endianness settings matches debug control register */
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if ( ( (dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_LITTLE_ENDIAN) ) ||
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( !(dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_BIG_ENDIAN) ) )
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{
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LOG_WARNING("DCR endianness settings does not match target settings");
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}
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LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
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LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
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mips32->num_data_bpoints);
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mips32->num_data_bpoints);
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@ -868,25 +868,22 @@ static int mips_m4k_read_memory(struct target *target, uint32_t address,
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if (ERROR_OK != retval)
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if (ERROR_OK != retval)
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return retval;
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return retval;
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/* TAP data register is loaded LSB first (little endian) */
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/* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */
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if (target->endianness == TARGET_BIG_ENDIAN)
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/* endianness, but byte array should represent target endianness */
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uint32_t i, t32;
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uint16_t t16;
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for(i = 0; i < (count*size); i += size)
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{
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{
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uint32_t i, t32;
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switch(size)
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uint16_t t16;
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for(i = 0; i < (count*size); i += size)
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{
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{
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switch(size)
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case 4:
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{
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t32 = *(uint32_t*)&buffer[i];
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case 4:
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target_buffer_set_u32(target,&buffer[i], t32);
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t32 = le_to_h_u32(&buffer[i]);
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break;
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h_u32_to_be(&buffer[i], t32);
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case 2:
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break;
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t16 = *(uint16_t*)&buffer[i];
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case 2:
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target_buffer_set_u16(target,&buffer[i], t16);
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t16 = le_to_h_u16(&buffer[i]);
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break;
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h_u16_to_be(&buffer[i], t16);
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break;
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}
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}
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}
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}
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}
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@ -915,49 +912,47 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address,
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if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
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if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
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return ERROR_TARGET_UNALIGNED_ACCESS;
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return ERROR_TARGET_UNALIGNED_ACCESS;
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/* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */
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/* endianness, but byte array represents target endianness */
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uint8_t * t = NULL;
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uint8_t * t = NULL;
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t = malloc(count * sizeof(uint32_t));
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/* TAP data register is loaded LSB first (little endian) */
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if (t == NULL)
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if (target->endianness == TARGET_BIG_ENDIAN)
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{
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{
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t = malloc(count * sizeof(uint32_t));
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LOG_ERROR("Out of memory");
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if (t == NULL)
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return ERROR_FAIL;
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{
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LOG_ERROR("Out of memory");
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return ERROR_FAIL;
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}
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uint32_t i, t32, t16;
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for(i = 0; i < (count*size); i += size)
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{
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switch(size)
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{
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case 4:
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t32 = be_to_h_u32((uint8_t *) &buffer[i]);
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h_u32_to_le(&t[i], t32);
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break;
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case 2:
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t16 = be_to_h_u16((uint8_t *) &buffer[i]);
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h_u16_to_le(&t[i], t16);
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break;
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}
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}
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buffer = t;
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}
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}
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uint32_t i, t32;
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uint16_t t16;
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for(i = 0; i < (count*size); i += size)
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{
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switch(size)
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{
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case 4:
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t32 = target_buffer_get_u32(target,&buffer[i]);
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*(uint32_t*)&t[i] = t32;
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break;
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case 2:
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t16 = target_buffer_get_u16(target,&buffer[i]);
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*(uint16_t*)&t[i] = t16;
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break;
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}
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}
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buffer = t;
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/* if noDMA off, use DMAACC mode for memory write */
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/* if noDMA off, use DMAACC mode for memory write */
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int retval;
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int retval;
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if (ejtag_info->impcode & EJTAG_IMP_NODMA)
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if (ejtag_info->impcode & EJTAG_IMP_NODMA)
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retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
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retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
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else
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else
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retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
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retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
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if (ERROR_OK != retval)
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return retval;
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if (t != NULL)
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if (t != NULL)
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free(t);
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free(t);
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if (ERROR_OK != retval)
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return retval;
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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@ -1065,31 +1060,25 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
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ejtag_info->fast_access_save = -1;
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ejtag_info->fast_access_save = -1;
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}
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}
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/* mips32_pracc_fastdata_xfer requires uint32_t in host endianness, */
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/* but byte array represents target endianness */
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uint8_t * t = NULL;
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uint8_t * t = NULL;
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const uint8_t *ec_buffer = buffer; /* endian-corrected buffer */
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t = malloc(count * sizeof(uint32_t));
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if (t == NULL)
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/* TAP data register is loaded LSB first (little endian) */
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if (target->endianness == TARGET_BIG_ENDIAN)
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{
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{
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t = malloc(count * sizeof(uint32_t));
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LOG_ERROR("Out of memory");
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if (t == NULL)
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return ERROR_FAIL;
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{
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LOG_ERROR("Out of memory");
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return ERROR_FAIL;
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}
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uint32_t i, t32;
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for(i = 0; i < (count * 4); i += 4)
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{
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t32 = be_to_h_u32((uint8_t *) &buffer[i]);
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h_u32_to_le(&t[i], t32);
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}
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ec_buffer = t;
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}
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}
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uint32_t i, t32;
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for(i = 0; i < (count*4); i += 4)
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{
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t32 = target_buffer_get_u32(target,&buffer[i]);
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*(uint32_t*)&t[i] = t32;
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}
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retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address,
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retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address,
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count, (uint32_t*) (void *)ec_buffer);
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count, (uint32_t*) (void *)t);
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if (t != NULL)
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if (t != NULL)
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free(t);
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free(t);
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