interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

am3517 evm: use physical write to memory while target is running 

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2010-06-22 12:49:56 +02:00
parent d236a48e8f
commit 4fa3cc7746
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
tcl/board/am3517evm.cfg
View File

@ -76,20 +76,20 @@ proc omap3_dbginit {target} {
# General Cortex A8 debug initialisation # General Cortex A8 debug initialisation
cortex_a8 dbginit cortex_a8 dbginit
# Enable DBGU signal for OMAP353x # Enable DBGU signal for OMAP353x
$target mww 0x5401d030 0x00002000 $target mww phys 0x5401d030 0x00002000
} }
# be absolutely certain the JTAG clock will work with the worst-case # be absolutely certain the JTAG clock will work with the worst-case
# 16.8MHz/2 = 8.4MHz core clock, even before a bootloader kicks in. # 16.8MHz/2 = 8.4MHz core clock, even before a bootloader kicks in.
# OK to speed up *after* PLL and clock tree setup. # OK to speed up *after* PLL and clock tree setup.
$_TARGETNAME configure -event "reset-start" { adapter_khz 10; halt; halt } $_TARGETNAME configure -event "reset-start" { adapter_khz 10}
# Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset # Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset
# ourselves using PRM_RSTCTRL. RST_GS (2) is a warm reset, like ICEpick # ourselves using PRM_RSTCTRL. RST_GS (2) is a warm reset, like ICEpick
# would issue. RST_DPLL3 (4) is a cold reset. # would issue. RST_DPLL3 (4) is a cold reset.
set PRM_RSTCTRL 0x48307250 set PRM_RSTCTRL 0x48307250
$_TARGETNAME configure -event reset-assert "$_TARGETNAME mww $PRM_RSTCTRL 2" $_TARGETNAME configure -event reset-assert "$_TARGETNAME mww phys $PRM_RSTCTRL 2"
$_TARGETNAME configure -event reset-assert-post "omap3_dbginit $_TARGETNAME; adapter_khz 1000" $_TARGETNAME configure -event reset-assert-post "omap3_dbginit $_TARGETNAME; adapter_khz 1000"