John McCarthy <jgmcc@magma.ca> two patches add a mips_m4k target option (ejtag_reset) to cause a reset command to use the EJTAG Peripheral and System Reset in addition to srst. This is for targets like the wrt54gl which do not connect the
srst to a system reset (I believe it just goes to a GPIO). git-svn-id: svn://svn.berlios.de/openocd/trunk@1050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -256,14 +256,21 @@ int mips_m4k_assert_reset(target_t *target)
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
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}
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}
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/* here we should issue a srst only, but we may have to assert trst as well */
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if (strcmp(target->variant, "ejtag_srst") == 0) {
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
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{
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LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
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jtag_add_reset(1, 1);
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
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}
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mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
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else
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} else {
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{
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/* here we should issue a srst only, but we may have to assert trst as well */
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jtag_add_reset(0, 1);
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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{
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jtag_add_reset(1, 1);
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}
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else
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{
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jtag_add_reset(0, 1);
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}
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}
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}
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target->state = TARGET_RESET;
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target->state = TARGET_RESET;
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