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John McCarthy <jgmcc@magma.ca> two patches add a mips_m4k target option (ejtag_reset) to cause a reset command to use the EJTAG Peripheral and System Reset in addition to srst. This is for targets like the wrt54gl which do not connect the 

srst to a system reset (I believe it just goes to a GPIO).

git-svn-id: svn://svn.berlios.de/openocd/trunk@1050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2008-10-14 06:26:33 +00:00
parent 539527ab74
commit 4fa359b53d
1 changed files with 15 additions and 8 deletions
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7
src/target/mips_m4k.c
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@ -256,6 +256,12 @@ int mips_m4k_assert_reset(target_t *target)
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
} }
if (strcmp(target->variant, "ejtag_srst") == 0) {
u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} else {
/* here we should issue a srst only, but we may have to assert trst as well */ /* here we should issue a srst only, but we may have to assert trst as well */
if (jtag_reset_config & RESET_SRST_PULLS_TRST) if (jtag_reset_config & RESET_SRST_PULLS_TRST)
{ {
@ -265,6 +271,7 @@ int mips_m4k_assert_reset(target_t *target)
{ {
jtag_add_reset(0, 1); jtag_add_reset(0, 1);
} }
}
target->state = TARGET_RESET; target->state = TARGET_RESET;
jtag_add_sleep(50000); jtag_add_sleep(50000);