cortex a8: add error propagation for poll/resume
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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@ -98,12 +98,15 @@ static int cortex_a8_init_debug_access(struct target *target)
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/* Clear Sticky Power Down status Bit in PRSR to enable access to
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the registers in the Core Power Domain */
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retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_PRSR, &dummy);
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if (retval != ERROR_OK)
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return retval;
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/* Enabling of instruction execution in debug mode is done in debug_entry code */
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/* Resync breakpoint registers */
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/* Since this is likley called from init or reset, update targtet state information*/
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cortex_a8_poll(target);
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retval = cortex_a8_poll(target);
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return retval;
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}
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@ -1005,6 +1008,7 @@ static int cortex_a8_step(struct target *target, int current, uint32_t address,
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struct breakpoint *breakpoint = NULL;
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struct breakpoint stepbreakpoint;
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struct reg *r;
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int retval;
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int timeout = 100;
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@ -1048,15 +1052,19 @@ static int cortex_a8_step(struct target *target, int current, uint32_t address,
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target->debug_reason = DBG_REASON_SINGLESTEP;
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cortex_a8_resume(target, 1, address, 0, 0);
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retval = cortex_a8_resume(target, 1, address, 0, 0);
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if (retval != ERROR_OK)
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return retval;
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while (target->state != TARGET_HALTED)
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{
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cortex_a8_poll(target);
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retval = cortex_a8_poll(target);
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if (retval != ERROR_OK)
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return retval;
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if (--timeout == 0)
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{
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LOG_WARNING("timeout waiting for target halt");
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break;
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LOG_ERROR("timeout waiting for target halt");
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return ERROR_FAIL;
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}
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}
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@ -1313,6 +1321,8 @@ static int cortex_a8_deassert_reset(struct target *target)
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jtag_add_reset(0, 0);
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retval = cortex_a8_poll(target);
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if (retval != ERROR_OK)
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return retval;
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if (target->reset_halt) {
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if (target->state != TARGET_HALTED) {
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