armv7a: rename l2_cache to outer_cache
The outer cache is not necessarily at L2 in a system. Rename functions to make that clear. Change-Id: Ia636a4844f50634f2bdf5cdce285febc1a47c11f Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3020 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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@ -409,7 +409,7 @@ static int armv7a_l2x_flush_all_data(struct target *target)
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int retval = ERROR_FAIL;
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int retval = ERROR_FAIL;
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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uint32_t base = l2x_cache->base;
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uint32_t base = l2x_cache->base;
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uint32_t l2_way = l2x_cache->way;
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uint32_t l2_way = l2x_cache->way;
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uint32_t l2_way_val = (1 << l2_way) - 1;
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uint32_t l2_way_val = (1 << l2_way) - 1;
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@ -429,7 +429,7 @@ static int armv7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
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{
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{
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a_cache->l2_cache);
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(armv7a_cache->outer_cache);
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if (armv7a_cache->ctype == -1) {
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if (armv7a_cache->ctype == -1) {
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command_print(cmd_ctx, "cache not yet identified");
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command_print(cmd_ctx, "cache not yet identified");
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@ -469,9 +469,9 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
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l2x_cache->way = way;
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l2x_cache->way = way;
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/*LOG_INFO("cache l2 initialized base %x way %d",
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/*LOG_INFO("cache l2 initialized base %x way %d",
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l2x_cache->base,l2x_cache->way);*/
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l2x_cache->base,l2x_cache->way);*/
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if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
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if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
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LOG_INFO("cache l2 already initialized\n");
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LOG_INFO("outer cache already initialized\n");
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armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
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armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
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/* initialize l1 / l2x cache function */
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/* initialize l1 / l2x cache function */
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache
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= armv7a_l2x_flush_all_data;
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= armv7a_l2x_flush_all_data;
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@ -483,9 +483,9 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
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curr = head->target;
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curr = head->target;
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if (curr != target) {
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if (curr != target) {
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armv7a = target_to_armv7a(curr);
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armv7a = target_to_armv7a(curr);
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if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
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if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
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LOG_ERROR("smp target : cache l2 already initialized\n");
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LOG_ERROR("smp target : outer cache already initialized\n");
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armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
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armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
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armv7a_l2x_flush_all_data;
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armv7a_l2x_flush_all_data;
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armv7a->armv7a_mmu.armv7a_cache.display_cache_info =
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armv7a->armv7a_mmu.armv7a_cache.display_cache_info =
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@ -748,8 +748,8 @@ int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a)
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armv7a->arm.target = target;
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armv7a->arm.target = target;
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armv7a->arm.common_magic = ARM_COMMON_MAGIC;
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armv7a->arm.common_magic = ARM_COMMON_MAGIC;
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armv7a->common_magic = ARMV7_COMMON_MAGIC;
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armv7a->common_magic = ARMV7_COMMON_MAGIC;
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armv7a->armv7a_mmu.armv7a_cache.l2_cache = NULL;
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armv7a->armv7a_mmu.armv7a_cache.ctype = -1;
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armv7a->armv7a_mmu.armv7a_cache.ctype = -1;
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armv7a->armv7a_mmu.armv7a_cache.outer_cache = NULL;
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache = NULL;
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armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache = NULL;
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armv7a->armv7a_mmu.armv7a_cache.display_cache_info = NULL;
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armv7a->armv7a_mmu.armv7a_cache.display_cache_info = NULL;
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armv7a->armv7a_mmu.armv7a_cache.auto_cache_enabled = 1;
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armv7a->armv7a_mmu.armv7a_cache.auto_cache_enabled = 1;
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@ -73,8 +73,8 @@ struct armv7a_cache_common {
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int d_u_cache_enabled;
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int d_u_cache_enabled;
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int auto_cache_enabled; /* openocd automatic
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int auto_cache_enabled; /* openocd automatic
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* cache handling */
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* cache handling */
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/* l2 external unified cache if some */
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/* outer unified cache if some */
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void *l2_cache;
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void *outer_cache;
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int (*flush_all_data_cache)(struct target *target);
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int (*flush_all_data_cache)(struct target *target);
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int (*display_cache_info)(struct command_context *cmd_ctx,
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int (*display_cache_info)(struct command_context *cmd_ctx,
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struct armv7a_cache_common *armv7a_cache);
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struct armv7a_cache_common *armv7a_cache);
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@ -29,7 +29,7 @@ static int arm7a_l2x_sanity_check(struct target *target)
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{
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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if (target->state != TARGET_HALTED) {
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("%s: target not halted", __func__);
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LOG_ERROR("%s: target not halted", __func__);
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@ -50,7 +50,7 @@ static int arm7a_l2x_flush_all_data(struct target *target)
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{
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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uint32_t l2_way_val;
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uint32_t l2_way_val;
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int retval;
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int retval;
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@ -70,7 +70,7 @@ int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
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{
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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/* FIXME: different controllers have different linelen? */
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/* FIXME: different controllers have different linelen? */
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uint32_t i, linelen = 32;
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uint32_t i, linelen = 32;
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int retval;
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int retval;
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@ -106,7 +106,7 @@ static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt,
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{
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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/* FIXME: different controllers have different linelen */
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/* FIXME: different controllers have different linelen */
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uint32_t i, linelen = 32;
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uint32_t i, linelen = 32;
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int retval;
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int retval;
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@ -142,7 +142,7 @@ static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt,
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{
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a->armv7a_mmu.armv7a_cache.l2_cache);
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(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
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/* FIXME: different controllers have different linelen */
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/* FIXME: different controllers have different linelen */
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uint32_t i, linelen = 32;
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uint32_t i, linelen = 32;
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int retval;
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int retval;
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@ -177,7 +177,7 @@ static int arm7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
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struct armv7a_cache_common *armv7a_cache)
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struct armv7a_cache_common *armv7a_cache)
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{
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{
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
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(armv7a_cache->l2_cache);
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(armv7a_cache->outer_cache);
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if (armv7a_cache->ctype == -1) {
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if (armv7a_cache->ctype == -1) {
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command_print(cmd_ctx, "cache not yet identified");
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command_print(cmd_ctx, "cache not yet identified");
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@ -198,7 +198,7 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
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struct target *curr;
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struct target *curr;
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
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if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
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LOG_ERROR("L2 cache was already initialised\n");
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LOG_ERROR("L2 cache was already initialised\n");
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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@ -206,7 +206,7 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
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l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
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l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
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l2x_cache->base = base;
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l2x_cache->base = base;
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l2x_cache->way = way;
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l2x_cache->way = way;
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armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
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armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
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/* initialize all targets in this cluster (smp target)
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/* initialize all targets in this cluster (smp target)
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* l2 cache must be configured after smp declaration */
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* l2 cache must be configured after smp declaration */
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@ -214,11 +214,11 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
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curr = head->target;
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curr = head->target;
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if (curr != target) {
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if (curr != target) {
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armv7a = target_to_armv7a(curr);
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armv7a = target_to_armv7a(curr);
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if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
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if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
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LOG_ERROR("smp target : cache l2 already initialized\n");
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LOG_ERROR("smp target : cache l2 already initialized\n");
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
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armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
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}
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}
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head = head->next;
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head = head->next;
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}
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}
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