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tcl/target/ti_k3: Convert Cortex-R5 ap port num as a variable 

Convert the Cortex-R5 ap port num as a variable to allow support for
the AM2x family of K3 SoCs.

Change-Id: I7dc8b459dca8b5f21395230b5cb782b14538bd48
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7942
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
Nishanth Menon 2023-10-17 13:56:00 -05:00 committed by Antonio Borneo
parent 00b0739082
commit 4b879bb017
1 changed files with 3 additions and 2 deletions
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5
tcl/target/ti_k3.cfg
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@ -56,6 +56,7 @@ set ARMV8_CTIBASE {0x90420000 0x90520000 0x90820000 0x90920000}
set R5_DBGBASE {0x9d010000 0x9d012000 0x9d410000 0x9d412000 0x9d510000 0x9d512000}
set R5_CTIBASE {0x9d018000 0x9d019000 0x9d418000 0x9d419000 0x9d518000 0x9d519000}
set R5_NAMES {mcu_r5.0 mcu_r5.1 main0_r5.0 main0_r5.1 main1_r5.0 main1_r5.1}
set _r5_ap_num 1
# Finally an General Purpose(GP) MCU
set CM4_CTIBASE {0x20001000}
@ -359,12 +360,12 @@ if { $_v8_smp_debug == 0 } {
for { set _core 0 } { $_core < $_r5_cores } { incr _core } {
set _r5_name [lindex $R5_NAMES $_core]
cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num 1 \
cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num $_r5_ap_num \
-baseaddr [lindex $R5_CTIBASE $_core]
# inactive core examination will fail - wait till startup of additional core
target create $_TARGETNAME.$_r5_name cortex_r4 -dap $_CHIPNAME.dap \
-dbgbase [lindex $R5_DBGBASE $_core] -ap-num 1 -defer-examine \
-dbgbase [lindex $R5_DBGBASE $_core] -ap-num $_r5_ap_num -defer-examine \
-rtos [_get_rtos_type_for_cpu $_TARGETNAME.$_r5_name]
$_TARGETNAME.$_r5_name configure -event gdb-attach {