- added sam7s256 test example, and test result
git-svn-id: svn://svn.berlios.de/openocd/trunk@415 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
mifi
parent
007e9e2d60
commit
4b06fa39ae
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@ -0,0 +1,50 @@
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/****************************************************************************
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* Copyright (c) 2006 by Michael Fischer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
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||||
****************************************************************************
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* History:
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*
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* 30.03.06 mifi First Version for Insight tutorial
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****************************************************************************/
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#ifndef __TYPEDEFS_H__
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#define __TYPEDEFS_H__
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/*
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* Some types to use Windows like source
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*/
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typedef char CHAR; /* 8-bit signed data */
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typedef unsigned char BYTE; /* 8-bit unsigned data */
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typedef unsigned short WORD; /* 16-bit unsigned data */
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typedef long LONG; /* 32-bit signed data */
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typedef unsigned long ULONG; /* 32-bit unsigned data */
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typedef unsigned long DWORD; /* 32-bit unsigned data */
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#endif /* !__TYPEDEFS_H_ */
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/*** EOF ***/
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@ -0,0 +1,146 @@
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#
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# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
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#
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##############################################################################################
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#
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# On command line:
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#
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# make all = Create project
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#
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# make clean = Clean project files.
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#
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# To rebuild project do "make clean" and "make all".
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#
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##############################################################################################
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# Start of default section
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#
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TRGT = arm-elf-
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CC = $(TRGT)gcc
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CP = $(TRGT)objcopy
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AS = $(TRGT)gcc -x assembler-with-cpp
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BIN = $(CP) -O ihex
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MCU = arm7tdmi
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# List all default C defines here, like -D_DEBUG=1
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DDEFS =
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# List all default ASM defines here, like -D_DEBUG=1
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DADEFS =
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# List all default directories to look for include files here
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DINCDIR =
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# List the default directory to look for the libraries here
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DLIBDIR =
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# List all default libraries here
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DLIBS =
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#
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# End of default section
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##############################################################################################
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##############################################################################################
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# Start of user section
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#
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# Define project name here
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PROJECT = test
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# Define linker script file here
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LDSCRIPT_RAM = ./prj/sam7s256_ram.ld
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LDSCRIPT_ROM = ./prj/sam7s256_rom.ld
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# List all user C define here, like -D_DEBUG=1
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UDEFS =
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# Define ASM defines here
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UADEFS =
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# List C source files here
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SRC = ./src/main.c
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# List ASM source files here
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ASRC = ./src/crt.s
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# List all user directories here
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UINCDIR = ./inc
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# List the user directory to look for the libraries here
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ULIBDIR =
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# List all user libraries here
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ULIBS =
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# Define optimisation level here
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OPT = -O0
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#
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# End of user defines
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##############################################################################################
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INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
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LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
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DEFS = $(DDEFS) $(UDEFS)
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ADEFS = $(DADEFS) $(UADEFS)
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OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
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LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
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LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
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LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
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# Generate dependency information
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CPFLAGS += -MD -MP -MF .dep/$(@F).d
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#
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# makefile rules
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#
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all: RAM ROM
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RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
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ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
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%o : %c
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$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
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%o : %s
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$(AS) -c $(ASFLAGS) $< -o $@
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%ram.elf: $(OBJS)
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$(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
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%rom.elf: $(OBJS)
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$(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
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%hex: %elf
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$(BIN) $< $@
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clean:
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-rm -f $(OBJS)
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-rm -f $(PROJECT)_ram.elf
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-rm -f $(PROJECT)_ram.map
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-rm -f $(PROJECT)_ram.hex
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-rm -f $(PROJECT)_rom.elf
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-rm -f $(PROJECT)_rom.map
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-rm -f $(PROJECT)_rom.hex
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-rm -f $(SRC:.c=.c.bak)
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-rm -f $(SRC:.c=.lst)
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-rm -f $(ASRC:.s=.s.bak)
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-rm -f $(ASRC:.s=.lst)
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-rm -fR .dep
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#
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# Include the dependency files, should be the last of the makefile
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#
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-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
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# *** EOF ***
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@ -0,0 +1,32 @@
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target remote localhost:3333
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monitor reset
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monitor sleep 500
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monitor poll
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monitor soft_reset_halt
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monitor arm7_9 sw_bkpts enable
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# WDT_MR, disable watchdog
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monitor mww 0xFFFFFD44 0x00008000
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# RSTC_MR, enable user reset
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monitor mww 0xfffffd08 0xa5000001
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# CKGR_MOR
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monitor mww 0xFFFFFC20 0x00000601
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monitor sleep 10
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# CKGR_PLLR
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monitor mww 0xFFFFFC2C 0x00481c0e
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monitor sleep 10
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# PMC_MCKR
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monitor mww 0xFFFFFC30 0x00000007
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monitor sleep 10
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# PMC_IER
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monitor mww 0xFFFFFF60 0x00480100
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monitor sleep 100
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load
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break main
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continue
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target remote localhost:3333
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monitor reset
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monitor sleep 500
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monitor poll
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monitor soft_reset_halt
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monitor arm7_9 force_hw_bkpts enable
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# WDT_MR, disable watchdog
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monitor mww 0xFFFFFD44 0x00008000
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# RSTC_MR, enable user reset
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monitor mww 0xfffffd08 0xa5000001
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# CKGR_MOR
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monitor mww 0xFFFFFC20 0x00000601
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monitor sleep 10
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# CKGR_PLLR
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monitor mww 0xFFFFFC2C 0x00481c0e
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monitor sleep 10
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# PMC_MCKR
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monitor mww 0xFFFFFC30 0x00000007
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monitor sleep 10
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# PMC_IER
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monitor mww 0xFFFFFF60 0x00480100
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monitor sleep 100
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load
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break main
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continue
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@ -0,0 +1,43 @@
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#daemon configuration
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telnet_port 4444
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gdb_port 3333
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# tell gdb our flash memory map
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# and enable flash programming
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gdb_memory_map enable
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gdb_flash_program enable
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#interface
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interface ft2232
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ft2232_device_desc "Amontec JTAGkey A"
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ft2232_layout jtagkey
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ft2232_vid_pid 0x0403 0xcff8
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jtag_speed 0
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target arm7tdmi little run_and_init 0 arm7tdmi
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run_and_halt_time 0 30
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target_script 0 reset .\prj\sam7s256_reset.script
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working_area 0 0x00200000 0x4000 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank at91sam7 0 0 0 0 0
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# For more information about the configuration files, take a look at:
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# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
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@ -0,0 +1,132 @@
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/****************************************************************************
|
||||
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************
|
||||
*
|
||||
* History:
|
||||
*
|
||||
* 30.03.06 mifi First Version
|
||||
****************************************************************************/
|
||||
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ENTRY(ResetHandler)
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SEARCH_DIR(.)
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/*
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* Define stack size here
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*/
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FIQ_STACK_SIZE = 0x0100;
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IRQ_STACK_SIZE = 0x0100;
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ABT_STACK_SIZE = 0x0100;
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UND_STACK_SIZE = 0x0100;
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SVC_STACK_SIZE = 0x0400;
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MEMORY
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{
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ram : org = 0x00200000, len = 64k
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}
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||||
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/*
|
||||
* Do not change the next code
|
||||
*/
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SECTIONS
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{
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||||
.text :
|
||||
{
|
||||
*(.vectors);
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||||
. = ALIGN(4);
|
||||
*(.init);
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||||
. = ALIGN(4);
|
||||
*(.text);
|
||||
. = ALIGN(4);
|
||||
*(.rodata);
|
||||
. = ALIGN(4);
|
||||
*(.rodata*);
|
||||
. = ALIGN(4);
|
||||
*(.glue_7t);
|
||||
. = ALIGN(4);
|
||||
*(.glue_7);
|
||||
. = ALIGN(4);
|
||||
etext = .;
|
||||
} > ram
|
||||
|
||||
.data :
|
||||
{
|
||||
PROVIDE (__data_start = .);
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
edata = .;
|
||||
_edata = .;
|
||||
PROVIDE (__data_end = .);
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
PROVIDE (__bss_start = .);
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__bss_end = .);
|
||||
|
||||
. = ALIGN(256);
|
||||
|
||||
PROVIDE (__stack_start = .);
|
||||
|
||||
PROVIDE (__stack_fiq_start = .);
|
||||
. += FIQ_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_fiq_end = .);
|
||||
|
||||
PROVIDE (__stack_irq_start = .);
|
||||
. += IRQ_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_irq_end = .);
|
||||
|
||||
PROVIDE (__stack_abt_start = .);
|
||||
. += ABT_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_abt_end = .);
|
||||
|
||||
PROVIDE (__stack_und_start = .);
|
||||
. += UND_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_und_end = .);
|
||||
|
||||
PROVIDE (__stack_svc_start = .);
|
||||
. += SVC_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_svc_end = .);
|
||||
PROVIDE (__stack_end = .);
|
||||
PROVIDE (__heap_start = .);
|
||||
} > ram
|
||||
|
||||
}
|
||||
/*** EOF ***/
|
||||
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#
|
||||
# Init - taken form the script openocd_at91sam7_ecr.script
|
||||
#
|
||||
# I take this script from the following page:
|
||||
#
|
||||
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
|
||||
#
|
||||
mww 0xfffffd44 0x00008000 # disable watchdog
|
||||
mww 0xfffffd08 0xa5000001 # enable user reset
|
||||
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
|
||||
sleep 10
|
||||
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
|
||||
sleep 10
|
||||
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
|
||||
sleep 10
|
||||
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
|
||||
sleep 100
|
||||
|
|
@ -0,0 +1,133 @@
|
|||
/****************************************************************************
|
||||
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************
|
||||
*
|
||||
* History:
|
||||
*
|
||||
* 26.01.08 mifi First Version
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
SEARCH_DIR(.)
|
||||
|
||||
/*
|
||||
* Define stack size here
|
||||
*/
|
||||
FIQ_STACK_SIZE = 0x0100;
|
||||
IRQ_STACK_SIZE = 0x0100;
|
||||
ABT_STACK_SIZE = 0x0100;
|
||||
UND_STACK_SIZE = 0x0100;
|
||||
SVC_STACK_SIZE = 0x0400;
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
rom : org = 0x00100000, len = 256k
|
||||
ram : org = 0x00200000, len = 64k
|
||||
}
|
||||
|
||||
/*
|
||||
* Do not change the next code
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
*(.vectors);
|
||||
. = ALIGN(4);
|
||||
*(.init);
|
||||
. = ALIGN(4);
|
||||
*(.text);
|
||||
. = ALIGN(4);
|
||||
*(.rodata);
|
||||
. = ALIGN(4);
|
||||
*(.rodata*);
|
||||
. = ALIGN(4);
|
||||
*(.glue_7t);
|
||||
. = ALIGN(4);
|
||||
*(.glue_7);
|
||||
. = ALIGN(4);
|
||||
etext = .;
|
||||
} > rom
|
||||
|
||||
.data :
|
||||
{
|
||||
PROVIDE (__data_start = .);
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
edata = .;
|
||||
_edata = .;
|
||||
PROVIDE (__data_end = .);
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
PROVIDE (__bss_start = .);
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__bss_end = .);
|
||||
|
||||
. = ALIGN(256);
|
||||
|
||||
PROVIDE (__stack_start = .);
|
||||
|
||||
PROVIDE (__stack_fiq_start = .);
|
||||
. += FIQ_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_fiq_end = .);
|
||||
|
||||
PROVIDE (__stack_irq_start = .);
|
||||
. += IRQ_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_irq_end = .);
|
||||
|
||||
PROVIDE (__stack_abt_start = .);
|
||||
. += ABT_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_abt_end = .);
|
||||
|
||||
PROVIDE (__stack_und_start = .);
|
||||
. += UND_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_und_end = .);
|
||||
|
||||
PROVIDE (__stack_svc_start = .);
|
||||
. += SVC_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
PROVIDE (__stack_svc_end = .);
|
||||
PROVIDE (__stack_end = .);
|
||||
PROVIDE (__heap_start = .);
|
||||
} > ram
|
||||
|
||||
}
|
||||
/*** EOF ***/
|
||||
|
||||
|
|
@ -0,0 +1,225 @@
|
|||
/****************************************************************************
|
||||
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************
|
||||
*
|
||||
* History:
|
||||
*
|
||||
* 18.12.06 mifi First Version
|
||||
* The hardware initialization is based on the startup file
|
||||
* crtat91sam7x256_rom.S from NutOS 4.2.1.
|
||||
* Therefore partial copyright by egnite Software GmbH.
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Some defines for the program status registers
|
||||
*/
|
||||
ARM_MODE_USER = 0x10 /* Normal User Mode */
|
||||
ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
|
||||
ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
|
||||
ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
|
||||
ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
|
||||
ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
|
||||
ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
|
||||
ARM_MODE_MASK = 0x1F
|
||||
|
||||
I_BIT = 0x80 /* disable IRQ when I bit is set */
|
||||
F_BIT = 0x40 /* disable IRQ when I bit is set */
|
||||
|
||||
/*
|
||||
* Register Base Address
|
||||
*/
|
||||
AIC_BASE = 0xFFFFF000
|
||||
AIC_EOICR_OFF = 0x130
|
||||
AIC_IDCR_OFF = 0x124
|
||||
|
||||
RSTC_MR = 0xFFFFFD08
|
||||
RSTC_KEY = 0xA5000000
|
||||
RSTC_URSTEN = 0x00000001
|
||||
|
||||
WDT_BASE = 0xFFFFFD40
|
||||
WDT_MR_OFF = 0x00000004
|
||||
WDT_WDDIS = 0x00008000
|
||||
|
||||
MC_BASE = 0xFFFFFF00
|
||||
MC_FMR_OFF = 0x00000060
|
||||
MC_FWS_1FWS = 0x00480100
|
||||
|
||||
.section .vectors,"ax"
|
||||
.code 32
|
||||
|
||||
/****************************************************************************/
|
||||
/* Vector table and reset entry */
|
||||
/****************************************************************************/
|
||||
_vectors:
|
||||
ldr pc, ResetAddr /* Reset */
|
||||
ldr pc, UndefAddr /* Undefined instruction */
|
||||
ldr pc, SWIAddr /* Software interrupt */
|
||||
ldr pc, PAbortAddr /* Prefetch abort */
|
||||
ldr pc, DAbortAddr /* Data abort */
|
||||
ldr pc, ReservedAddr /* Reserved */
|
||||
ldr pc, IRQAddr /* IRQ interrupt */
|
||||
ldr pc, FIQAddr /* FIQ interrupt */
|
||||
|
||||
|
||||
ResetAddr: .word ResetHandler
|
||||
UndefAddr: .word UndefHandler
|
||||
SWIAddr: .word SWIHandler
|
||||
PAbortAddr: .word PAbortHandler
|
||||
DAbortAddr: .word DAbortHandler
|
||||
ReservedAddr: .word 0
|
||||
IRQAddr: .word IRQHandler
|
||||
FIQAddr: .word FIQHandler
|
||||
|
||||
.ltorg
|
||||
|
||||
.section .init, "ax"
|
||||
.code 32
|
||||
|
||||
.global ResetHandler
|
||||
.global ExitFunction
|
||||
.extern main
|
||||
/****************************************************************************/
|
||||
/* Reset handler */
|
||||
/****************************************************************************/
|
||||
ResetHandler:
|
||||
/*
|
||||
* The watchdog is enabled after processor reset. Disable it.
|
||||
*/
|
||||
ldr r1, =WDT_BASE
|
||||
ldr r0, =WDT_WDDIS
|
||||
str r0, [r1, #WDT_MR_OFF]
|
||||
|
||||
|
||||
/*
|
||||
* Enable user reset: assertion length programmed to 1ms
|
||||
*/
|
||||
ldr r0, =(RSTC_KEY | RSTC_URSTEN | (4 << 8))
|
||||
ldr r1, =RSTC_MR
|
||||
str r0, [r1, #0]
|
||||
|
||||
|
||||
/*
|
||||
* Use 2 cycles for flash access.
|
||||
*/
|
||||
ldr r1, =MC_BASE
|
||||
ldr r0, =MC_FWS_1FWS
|
||||
str r0, [r1, #MC_FMR_OFF]
|
||||
|
||||
|
||||
/*
|
||||
* Disable all interrupts. Useful for debugging w/o target reset.
|
||||
*/
|
||||
ldr r1, =AIC_BASE
|
||||
mvn r0, #0
|
||||
str r0, [r1, #AIC_EOICR_OFF]
|
||||
str r0, [r1, #AIC_IDCR_OFF]
|
||||
|
||||
|
||||
/*
|
||||
* Setup a stack for each mode
|
||||
*/
|
||||
msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
|
||||
ldr sp, =__stack_und_end
|
||||
|
||||
msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
|
||||
ldr sp, =__stack_abt_end
|
||||
|
||||
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
|
||||
ldr sp, =__stack_fiq_end
|
||||
|
||||
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
|
||||
ldr sp, =__stack_irq_end
|
||||
|
||||
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
|
||||
ldr sp, =__stack_svc_end
|
||||
|
||||
|
||||
/*
|
||||
* Clear .bss section
|
||||
*/
|
||||
ldr r1, =__bss_start
|
||||
ldr r2, =__bss_end
|
||||
ldr r3, =0
|
||||
bss_clear_loop:
|
||||
cmp r1, r2
|
||||
strne r3, [r1], #+4
|
||||
bne bss_clear_loop
|
||||
|
||||
|
||||
/*
|
||||
* Jump to main
|
||||
*/
|
||||
mrs r0, cpsr
|
||||
bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
|
||||
msr cpsr, r0
|
||||
|
||||
mov r0, #0 /* No arguments */
|
||||
mov r1, #0 /* No arguments */
|
||||
ldr r2, =main
|
||||
mov lr, pc
|
||||
bx r2 /* And jump... */
|
||||
|
||||
ExitFunction:
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b ExitFunction
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Default interrupt handler */
|
||||
/****************************************************************************/
|
||||
|
||||
UndefHandler:
|
||||
b UndefHandler
|
||||
|
||||
SWIHandler:
|
||||
b SWIHandler
|
||||
|
||||
PAbortHandler:
|
||||
b PAbortHandler
|
||||
|
||||
DAbortHandler:
|
||||
b DAbortHandler
|
||||
|
||||
IRQHandler:
|
||||
b IRQHandler
|
||||
|
||||
FIQHandler:
|
||||
b FIQHandler
|
||||
|
||||
.weak ExitFunction
|
||||
.weak UndefHandler, PAbortHandler, DAbortHandler
|
||||
.weak IRQHandler, FIQHandler
|
||||
|
||||
.ltorg
|
||||
/*** EOF ***/
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,91 @@
|
|||
/****************************************************************************
|
||||
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************
|
||||
* History:
|
||||
*
|
||||
* 30.03.06 mifi First Version for Insight tutorial
|
||||
* 26.01.08 mifi Added variable "d" to test const variable.
|
||||
****************************************************************************/
|
||||
#define __MAIN_C__
|
||||
|
||||
/*
|
||||
* I use the include only, to show
|
||||
* how to setup a include dir in the makefile
|
||||
*/
|
||||
#include "typedefs.h"
|
||||
|
||||
/*=========================================================================*/
|
||||
/* DEFINE: All Structures and Common Constants */
|
||||
/*=========================================================================*/
|
||||
|
||||
/*=========================================================================*/
|
||||
/* DEFINE: Prototypes */
|
||||
/*=========================================================================*/
|
||||
|
||||
/*=========================================================================*/
|
||||
/* DEFINE: Definition of all local Data */
|
||||
/*=========================================================================*/
|
||||
static const DWORD d = 7;
|
||||
|
||||
/*=========================================================================*/
|
||||
/* DEFINE: Definition of all local Procedures */
|
||||
/*=========================================================================*/
|
||||
|
||||
/*=========================================================================*/
|
||||
/* DEFINE: All code exported */
|
||||
/*=========================================================================*/
|
||||
/***************************************************************************/
|
||||
/* main */
|
||||
/***************************************************************************/
|
||||
int main (void)
|
||||
{
|
||||
DWORD a = 1;
|
||||
DWORD b = 2;
|
||||
DWORD c = 0;
|
||||
|
||||
a = a + d;
|
||||
|
||||
while (1)
|
||||
{
|
||||
a++;
|
||||
b++;
|
||||
c = a + b;
|
||||
}
|
||||
|
||||
/*
|
||||
* This return here make no sense.
|
||||
* But to prevent the compiler warning:
|
||||
* "return type of 'main' is not 'int'
|
||||
* we use an int as return :-)
|
||||
*/
|
||||
return(0);
|
||||
}
|
||||
|
||||
/*** EOF ***/
|
||||
|
|
@ -32,91 +32,103 @@
|
|||
<table border="1">
|
||||
<tr>
|
||||
<th width="65">ID</th>
|
||||
<th width="150">Synopsis</th>
|
||||
<th width="165">Synopsis</th>
|
||||
<th align="center" width="110">Passed version</th>
|
||||
<th align="center" width="110">Broken version</th>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65">ocd1</td>
|
||||
<td width="150">Telnet Windows</td>
|
||||
<td width="165">Telnet Windows</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65">ocd2</td>
|
||||
<td width="150">Telnet Linux</td>
|
||||
<td width="165">Telnet Linux</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65">ocd3</td>
|
||||
<td width="150">Telnet Cygwin</td>
|
||||
<td width="165">Telnet Cygwin</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#test_ocd4">ocd4</a></td>
|
||||
<td width="150">ARM7 debugging</td>
|
||||
<td width="165">ARM7 debugging</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65">xscale1</td>
|
||||
<td width="150">XScale debugging</td>
|
||||
<td width="165">XScale debugging</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65">xscale2</td>
|
||||
<td width="150">XScale MMU</td>
|
||||
<td width="165">XScale MMU</td>
|
||||
<td align="center" width="110">291</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
|
||||
<td width="150">str710 ram debugging</td>
|
||||
<td width="165">str710 ram debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
|
||||
<td width="150">str710 rom debugging</td>
|
||||
<td width="165">str710 rom debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110"><b>406</b></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
|
||||
<td width="150">str912 ram debugging</td>
|
||||
<td width="165">str912 ram debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
|
||||
<td width="150">str912 rom debugging</td>
|
||||
<td width="165">str912 rom debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
|
||||
<td width="150">lpc2148 ram debugging</td>
|
||||
<td width="165">lpc2148 ram debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
|
||||
<td width="150">lpc2148 rom debugging</td>
|
||||
<td width="165">lpc2148 rom debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
|
||||
<td width="150">lpc2294 ram debugging</td>
|
||||
<td width="165">lpc2294 ram debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
|
||||
<td width="150">lpc2294 rom debugging</td>
|
||||
<td width="165">lpc2294 rom debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
|
||||
<td width="165">sam7s256 ram debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
|
||||
<td width="165">sam7s256 rom debugging</td>
|
||||
<td align="center" width="110">320</td>
|
||||
<td align="center" width="110">n/a</td>
|
||||
</tr>
|
||||
|
|
|
|||
Loading…
Reference in New Issue