more tcl/{board,target} cleanup
Remove more remnants of the old "jtag_device" syntax. Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity. Remove various non-supported "-variant" target options; they're not needed often at all. Flag some of the board files as needing to have and use target files for the TAP and target declarations. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -1,5 +1,9 @@
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#Script for AT91EB40a
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# FIXME use some standard target config, maybe create one from this
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#
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# source [find target/...cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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@ -30,12 +34,11 @@ if { [info exists CPUTAPID ] } {
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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#target configuration
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
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# speed up memory downloads
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arm7_9 fast_memory_access enable
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@ -5,6 +5,10 @@
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# #
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#################################################################################################
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# FIXME use some standard target config, maybe create one from this
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#
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# source [find target/...cfg]
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# Define basic characteristics for the CPU. The AT91SAM9G20 processor is a subtle variant of
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# the AT91SAM9260 and shares the same tap ID as it.
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@ -34,8 +38,8 @@ jtag_ntrst_delay 200
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jtag_rclk 5
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
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# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
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@ -4,6 +4,10 @@
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reset_config trst_and_srst
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# FIXME use some standard target config, maybe create one from this
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#
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# source [find target/...cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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@ -29,7 +33,7 @@ if { [info exists CPUTAPID ] } {
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set _CPUTAPID 0x07926031
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}
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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set _TARGETNAME $_CHIPNAME.cpu
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag_nsrst_delay 200
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@ -40,7 +44,7 @@ jtag_ntrst_delay 0
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# Target configuration
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######################
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -event reset-init {
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mww 0x90600104 0x33313333
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@ -11,8 +11,13 @@ jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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#
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# FIXME use the standard str912 target config; that script might need
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# updating to "-ignore-version" for the boundary scan TAP
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#
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# source [find target/str912.cfg]
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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@ -50,8 +55,8 @@ if { [info exists BSTAPID ] } {
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -event reset-init {
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# We can increase speed now that we know the target is halted.
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@ -71,6 +71,11 @@
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#
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#
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#
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# FIXME use some standard target config, maybe create one from this
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#
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# source [find target/...cfg]
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#-------------------------------------------------------------------------
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# Target configuration for the Samsung 2440 system on chip
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# Tested on a S3C2440 Evaluation board by keesj
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@ -102,8 +107,8 @@ if { [info exists CPUTAPID ] } {
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
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#reset configuration
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@ -3,6 +3,10 @@
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# Need reset scripts
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reset_config trst_and_srst
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# FIXME use some standard target config, maybe create one from this
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#
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# source [find target/...cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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@ -37,8 +41,8 @@ if { [info exists BSTAPID ] } {
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 1
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$_TARGETNAME configure -event reset-init {
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@ -31,8 +31,8 @@ if { [info exists CPUTAPID ] } {
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
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# at CPU CLK <32kHz this must be disabled
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arm7_9 fast_memory_access enable
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@ -10,7 +10,7 @@ set CHIPNAME ar71xx
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jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
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set TARGETNAME [format "%s.cpu" $CHIPNAME]
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set TARGETNAME $CHIPNAME.cpu
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target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
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$TARGETNAME configure -event reset-halt-post {
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@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D
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# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
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# C100's ARAM 64k SRAM
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@ -29,7 +29,7 @@ if { [info exists ETBTAPID ] } {
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reset_config trst_and_srst separate
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# Define the _TARGETNAME
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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set _TARGETNAME $_CHIPNAME.cpu
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# Include the ETB tap controller if asked for.
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# Has to be done manually for newer devices (not an "old" LPC2917/2919).
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@ -39,8 +39,8 @@ jtag_ntrst_delay 20
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# Target configuration
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######################
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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# built-in RAM0
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#working_area 0 0xf8004000 0x4000 nobackup
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@ -39,8 +39,8 @@ jtag_ntrst_delay 20
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# Target configuration
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######################
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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# built-in RAM0
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#working_area 0 0xf8004000 0x4000 nobackup
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