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target/riscv: fix trailing spaces

This commit is contained in:
Liviu Ionescu 2018-06-12 23:58:56 +03:00
parent 8022a315a6
commit 45921eecd8
1 changed files with 10 additions and 10 deletions
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20
src/target/riscv/riscv.c
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@ -1530,17 +1530,17 @@ extern __COMMAND_HANDLER(handle_common_semihosting_resumable_exit_command);
extern __COMMAND_HANDLER(handle_common_semihosting_cmdline); extern __COMMAND_HANDLER(handle_common_semihosting_cmdline);
/* /*
* To be noted that RISC-V targets use the same semihosting commands as * To be noted that RISC-V targets use the same semihosting commands as
* ARM targets. * ARM targets.
* *
* The main reason is compatibility with existing tools. For example the * The main reason is compatibility with existing tools. For example the
* Eclipse OpenOCD/SEGGER J-Link/QEMU plug-ins have several widgets to * Eclipse OpenOCD/SEGGER J-Link/QEMU plug-ins have several widgets to
* configure semihosting, which generate commands like `arm semihosting * configure semihosting, which generate commands like `arm semihosting
* enable`. * enable`.
* A secondary reason is the fact that the protocol used is exactly the * A secondary reason is the fact that the protocol used is exactly the
* one specified by ARM. If RISC-V will ever define its own semihosting * one specified by ARM. If RISC-V will ever define its own semihosting
* protocol, then a command like `riscv semihosting enable` will make * protocol, then a command like `riscv semihosting enable` will make
* sense, but for now all semihosting commands are prefixed with `arm`. * sense, but for now all semihosting commands are prefixed with `arm`.
*/ */
static const struct command_registration arm_exec_command_handlers[] = { static const struct command_registration arm_exec_command_handlers[] = {
{ {