Removed exit()'s. A reset is usually enough to work around these, reducing cycle times
to get config scripts right. git-svn-id: svn://svn.berlios.de/openocd/trunk@528 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -519,13 +519,13 @@ int arm7_9_enable_sw_bkpts(struct target_s *target)
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else
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{
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LOG_ERROR("BUG: both watchpoints used, but wp_available >= 1");
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exit(-1);
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return ERROR_FAIL;
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}
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if ((retval = jtag_execute_queue()) != ERROR_OK)
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{
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LOG_ERROR("error writing EmbeddedICE registers to enable sw breakpoints");
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exit(-1);
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return ERROR_FAIL;
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};
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return ERROR_OK;
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@ -1225,8 +1225,7 @@ int arm7_9_full_context(target_t *target)
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if ((retval = jtag_execute_queue()) != ERROR_OK)
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{
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LOG_ERROR("JTAG failure");
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exit(-1);
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return retval;
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}
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return ERROR_OK;
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}
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@ -1381,12 +1380,7 @@ int arm7_9_restart_core(struct target_s *target)
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arm_jtag_set_instr(jtag_info, 0x4, NULL);
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jtag_add_runtest(1, TAP_RTI);
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if ((jtag_execute_queue()) != ERROR_OK)
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{
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exit(-1);
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}
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return ERROR_OK;
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return jtag_execute_queue();
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}
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void arm7_9_enable_watchpoints(struct target_s *target)
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@ -1484,7 +1478,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
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else
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{
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LOG_ERROR("unhandled core state");
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exit(-1);
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return ERROR_FAIL;
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}
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buf_set_u32(dbg_ctrl->value, EICE_DBG_CONTROL_DBGACK, 1, 0);
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@ -1526,7 +1520,7 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
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else
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{
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LOG_ERROR("unhandled core state");
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exit(-1);
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return ERROR_FAIL;
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}
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/* deassert DBGACK and INTDIS */
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@ -1633,7 +1627,7 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
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else
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{
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LOG_ERROR("unhandled core state");
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exit(-1);
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return ERROR_FAIL;
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}
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target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
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@ -1705,8 +1699,7 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod
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if ((retval = jtag_execute_queue()) != ERROR_OK)
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{
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LOG_ERROR("JTAG failure");
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exit(-1);
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return retval;
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}
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ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).valid = 1;
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