From a414ffaf65171bf2d1ed289397befca3cbf8b967 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Mon, 12 Aug 2024 13:39:36 +0200 Subject: [PATCH 01/43] doc: document command 'ms' Add documentation for the commands 'ms'. Change-Id: I247adce1c586c4f4cd36d044d48298c370635e67 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8432 Tested-by: jenkins --- doc/openocd.texi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/doc/openocd.texi b/doc/openocd.texi index 794762fa2..c78638276 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -9621,6 +9621,12 @@ Add or replace help text on the given @var{command_name}. Add or replace usage text on the given @var{command_name}. @end deffn +@deffn {Command} {ms} +Returns current time since the Epoch in ms +(See: @url{https://en.wikipedia.org/wiki/Epoch_(computing)}). +Useful to compute delays in TCL. +@end deffn + @node Architecture and Core Commands @chapter Architecture and Core Commands @cindex Architecture Specific Commands From ea859e1cd042578ea17994b56ac15be216eefe4a Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 14 Jul 2024 11:28:49 +0200 Subject: [PATCH 02/43] helper: command: drop radix parameter from command_parse_str_to_buf() Commit 53b94fad58ab ("binarybuffer: Fix str_to_buf() parsing function") introduces the helper command_parse_str_to_buf() to parse as number a string on TCL command-line. The parameter 'radix' can specify the base (decimal, octal, hexadecimal, or auto-detected). TCL is supposed to use decimal numbers by default, while octal and hexadecimal numbers must be prefixed respectively with '0' and '0x' (or '0X'). This would require the helper to always run auto-detection of the base, thus always set the 'radix' parameter to zero. This makes the parameter useless. Keeping the 'radix' parameter can open the door to future abuse of TCL syntax, E.g. a command can require an octal value without the mandatory TCL '0' prefix; the octal value cannot be the result of TCL expression. To prevent any future abuse of the 'radix' parameter, drop it. Change-Id: I88855bd83b4e08e8fdcf86a2fa5ef3269dd4ad57 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8393 Tested-by: jenkins Reviewed-by: Jan Matyas --- src/helper/command.c | 25 +++---------------------- src/helper/command.h | 8 +++----- src/jtag/tcl.c | 2 +- src/target/target.c | 5 ++--- 4 files changed, 9 insertions(+), 31 deletions(-) diff --git a/src/helper/command.c b/src/helper/command.c index 15a9b4a08..b5dd927f2 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -1360,37 +1360,18 @@ int command_parse_bool_arg(const char *in, bool *out) return ERROR_COMMAND_SYNTAX_ERROR; } -static const char *radix_to_str(unsigned int radix) -{ - switch (radix) { - case 16: return "hexadecimal"; - case 10: return "decadic"; - case 8: return "octal"; - } - assert(false); - return ""; -} - -COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len, - unsigned int radix) +COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len) { assert(str); assert(buf); - int ret = str_to_buf(str, buf, buf_len, radix, NULL); + int ret = str_to_buf(str, buf, buf_len, 0, NULL); if (ret == ERROR_OK) return ret; /* Provide a clear error message to the user */ if (ret == ERROR_INVALID_NUMBER) { - if (radix == 0) { - /* Any radix is accepted, so don't include it in the error message. */ - command_print(CMD, "'%s' is not a valid number", str); - } else { - /* Specific radix is required - tell the user what it is. */ - command_print(CMD, "'%s' is not a valid number (requiring %s number)", - str, radix_to_str(radix)); - } + command_print(CMD, "'%s' is not a valid number", str); } else if (ret == ERROR_NUMBER_EXCEEDS_BUFFER) { command_print(CMD, "Number %s exceeds %u bits", str, buf_len); } else { diff --git a/src/helper/command.h b/src/helper/command.h index 7a044e619..b224bd022 100644 --- a/src/helper/command.h +++ b/src/helper/command.h @@ -519,14 +519,12 @@ COMMAND_HELPER(handle_command_parse_bool, bool *out, const char *label); /** * Parse a number (base 10, base 16 or base 8) and store the result - * into a bit buffer. + * into a bit buffer. Use the prefixes '0' and '0x' for base 8 and 16, + * otherwise defaults to base 10. * * In case of parsing error, a user-readable error message is produced. - * - * If radix = 0 is given, the function guesses the radix by looking at the number prefix. */ -COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len, - unsigned int radix); +COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len); /** parses an on/off command argument */ #define COMMAND_PARSE_ON_OFF(in, out) \ diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index 10a7dd3f8..624b4e4c2 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -89,7 +89,7 @@ static COMMAND_HELPER(handle_jtag_command_drscan_fields, struct scan_field *fiel } fields[field_count].out_value = t; - int ret = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[i + 1], t, bits, 0); + int ret = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[i + 1], t, bits); if (ret != ERROR_OK) return ret; fields[field_count].in_value = t; diff --git a/src/target/target.c b/src/target/target.c index b6159c72b..09396d878 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -3133,7 +3133,7 @@ COMMAND_HANDLER(handle_reg_command) return ERROR_FAIL; } - int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[1], buf, reg->size, 0); + int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[1], buf, reg->size); if (retval != ERROR_OK) { free(buf); return retval; @@ -4835,8 +4835,7 @@ COMMAND_HANDLER(handle_set_reg_command) return ERROR_FAIL; } - int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, - reg_value, buf, reg->size, 0); + int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, reg_value, buf, reg->size); if (retval != ERROR_OK) { free(buf); return retval; From 8a3efbf21fda2ac673c401f8b9ec82d300c2af29 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 14 Jul 2024 12:09:15 +0200 Subject: [PATCH 03/43] binarybuffer: simplify the prototype of str_to_buf() With 'radix' always zero and '_detected_radix' always NULL, drop the two parameters and simplify str_to_buf(). While there: - drop some redundant assert(), - drop the re-check for the base prefix, - simplify str_strip_number_prefix_if_present() and rename it, as the prefix MUST be present, - fix a minor typo, - update the doxygen description of str_to_buf(). Change-Id: I1abdc8ec0587b23881953d3094101c04d5bb1c58 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8394 Tested-by: jenkins Reviewed-by: Jan Matyas --- src/helper/binarybuffer.c | 42 ++++++++++++++------------------------- src/helper/binarybuffer.h | 9 ++++----- src/helper/command.c | 2 +- 3 files changed, 20 insertions(+), 33 deletions(-) diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 3e09143c6..da6e10bab 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -225,49 +225,37 @@ static bool str_has_octal_prefix(const char *s) */ static unsigned int str_radix_guess(const char *str) { - assert(str); - if (str_has_hex_prefix(str)) return 16; if (str_has_octal_prefix(str)) return 8; - /* Otherwise assume a decadic number. */ + /* Otherwise assume a decimal number. */ return 10; } /** Strip leading "0x" or "0X" from hex numbers or "0" from octal numbers. */ -static void str_strip_number_prefix_if_present(const char **_str, unsigned int radix) +static const char *str_strip_number_prefix(const char *str, unsigned int radix) { - assert(radix == 16 || radix == 10 || radix == 8); - assert(_str); - - const char *str = *_str; - assert(str); - - if (radix == 16 && str_has_hex_prefix(str)) - str += 2; - else if (radix == 8 && str_has_octal_prefix(str)) - str += 1; - - /* No prefix to strip for radix == 10. */ - - *_str = str; + switch (radix) { + case 16: + return str + 2; + case 8: + return str + 1; + case 10: + default: + return str; + } } -int str_to_buf(const char *str, void *_buf, unsigned int buf_len, - unsigned int radix, unsigned int *_detected_radix) +int str_to_buf(const char *str, void *_buf, unsigned int buf_len) { - assert(radix == 0 || radix == 8 || radix == 10 || radix == 16); + assert(str); - if (radix == 0) - radix = str_radix_guess(str); + unsigned int radix = str_radix_guess(str); - if (_detected_radix) - *_detected_radix = radix; - - str_strip_number_prefix_if_present(&str, radix); + str = str_strip_number_prefix(str, radix); const size_t str_len = strlen(str); if (str_len == 0) diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h index 441374330..6cff86bd9 100644 --- a/src/helper/binarybuffer.h +++ b/src/helper/binarybuffer.h @@ -194,15 +194,14 @@ void *buf_set_buf(const void *src, unsigned src_start, /** * Parse an unsigned number (provided as a zero-terminated string) - * into a bit buffer whose size is buf_len bits. + * into a bit buffer whose size is buf_len bits. The base of the + * number is detected between decimal, hexadecimal and octal. * @param str Input number, zero-terminated string * @param _buf Output buffer, allocated by the caller * @param buf_len Output buffer size in bits - * @param radix Base of the input number - 16, 10, 8 or 0. - * 0 means auto-detect the radix. + * @returns Error on invalid or overflowing number */ -int str_to_buf(const char *str, void *_buf, unsigned int buf_len, - unsigned int radix, unsigned int *_detected_radix); +int str_to_buf(const char *str, void *_buf, unsigned int buf_len); char *buf_to_hex_str(const void *buf, unsigned size); diff --git a/src/helper/command.c b/src/helper/command.c index b5dd927f2..907869325 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -1365,7 +1365,7 @@ COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned in assert(str); assert(buf); - int ret = str_to_buf(str, buf, buf_len, 0, NULL); + int ret = str_to_buf(str, buf, buf_len); if (ret == ERROR_OK) return ret; From bee5999a447880dda271926bbbd7d49dc5f4fbe9 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 14 Jul 2024 12:31:53 +0200 Subject: [PATCH 04/43] binarybuffer: str_to_buf(): rename buf_len as buf_bitsize The name 'buf_len' is misleading, as it usually refers to the byte length of a buffer. Here we use it for the length in bits. Rename it as 'buf_bitsize'. While there, fix checkpatch error by changing the index type to 'unsigned int'. Change-Id: I78855ed79a346d996d9c0100d94d14c64a36b228 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8395 Tested-by: jenkins Reviewed-by: Jan Matyas --- src/helper/binarybuffer.c | 14 +++++++------- src/helper/binarybuffer.h | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index da6e10bab..dd1449276 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -249,7 +249,7 @@ static const char *str_strip_number_prefix(const char *str, unsigned int radix) } } -int str_to_buf(const char *str, void *_buf, unsigned int buf_len) +int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize) { assert(str); @@ -314,18 +314,18 @@ int str_to_buf(const char *str, void *_buf, unsigned int buf_len) assert(tmp == 0); } - /* The result must not contain more bits than buf_len. */ + /* The result must not contain more bits than buf_bitsize. */ /* Check the whole bytes: */ - for (unsigned int j = DIV_ROUND_UP(buf_len, 8); j < b256_len; j++) { + for (unsigned int j = DIV_ROUND_UP(buf_bitsize, 8); j < b256_len; j++) { if (b256_buf[j] != 0x0) { free(b256_buf); return ERROR_NUMBER_EXCEEDS_BUFFER; } } /* Check the partial byte: */ - if (buf_len % 8) { - const uint8_t mask = 0xFFu << (buf_len % 8); - if ((b256_buf[(buf_len / 8)] & mask) != 0x0) { + if (buf_bitsize % 8) { + const uint8_t mask = 0xFFu << (buf_bitsize % 8); + if ((b256_buf[(buf_bitsize / 8)] & mask) != 0x0) { free(b256_buf); return ERROR_NUMBER_EXCEEDS_BUFFER; } @@ -333,7 +333,7 @@ int str_to_buf(const char *str, void *_buf, unsigned int buf_len) /* Copy the digits to the output buffer */ uint8_t *buf = _buf; - for (unsigned j = 0; j < DIV_ROUND_UP(buf_len, 8); j++) { + for (unsigned int j = 0; j < DIV_ROUND_UP(buf_bitsize, 8); j++) { if (j < b256_len) buf[j] = b256_buf[j]; else diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h index 6cff86bd9..103a48c5c 100644 --- a/src/helper/binarybuffer.h +++ b/src/helper/binarybuffer.h @@ -198,10 +198,10 @@ void *buf_set_buf(const void *src, unsigned src_start, * number is detected between decimal, hexadecimal and octal. * @param str Input number, zero-terminated string * @param _buf Output buffer, allocated by the caller - * @param buf_len Output buffer size in bits + * @param buf_bitsize Output buffer size in bits * @returns Error on invalid or overflowing number */ -int str_to_buf(const char *str, void *_buf, unsigned int buf_len); +int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize); char *buf_to_hex_str(const void *buf, unsigned size); From bfd3110e59f5b13c075823c654f1a51cfcd66d4d Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 14 Jul 2024 14:59:34 +0200 Subject: [PATCH 05/43] binarybuffer: str_to_buf(): simplify it and fix scan-build error The function str_to_buf() can be simplified by writing directly the intermediate results in the output buffer. Such simplification improves the readability and also makes scan-build happy, as it does not trigger anymore the warning: src/helper/binarybuffer.c:328:8: warning: Use of memory allocated with size zero [unix.Malloc] if ((b256_buf[(buf_len / 8)] & mask) != 0x0) { Change-Id: I1cef9a1ec5ff0e5841ba582610f273e89e7a81da Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8396 Reviewed-by: Jan Matyas Tested-by: jenkins --- src/helper/binarybuffer.c | 99 ++++++++++----------------------------- 1 file changed, 26 insertions(+), 73 deletions(-) diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index dd1449276..509f24f0b 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -175,19 +175,6 @@ uint32_t flip_u32(uint32_t value, unsigned int num) return c; } -static int ceil_f_to_u32(float x) -{ - if (x < 0) /* return zero for negative numbers */ - return 0; - - uint32_t y = x; /* cut off fraction */ - - if ((x - y) > 0.0) /* if there was a fractional part, increase by one */ - y++; - - return y; -} - char *buf_to_hex_str(const void *_buf, unsigned buf_len) { unsigned len_bytes = DIV_ROUND_UP(buf_len, 8); @@ -252,7 +239,10 @@ static const char *str_strip_number_prefix(const char *str, unsigned int radix) int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize) { assert(str); + assert(_buf); + assert(buf_bitsize > 0); + uint8_t *buf = _buf; unsigned int radix = str_radix_guess(str); str = str_strip_number_prefix(str, radix); @@ -261,86 +251,49 @@ int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize) if (str_len == 0) return ERROR_INVALID_NUMBER; - float factor = 0.0; - if (radix == 16) - factor = 0.5; /* log(16) / log(256) = 0.5 */ - else if (radix == 10) - factor = 0.41524; /* log(10) / log(256) = 0.41524 */ - else if (radix == 8) - factor = 0.375; /* log(8) / log(256) = 0.375 */ - else - assert(false); - - const unsigned int b256_len = ceil_f_to_u32(str_len * factor); - - /* Allocate a buffer for digits in base-256 notation */ - uint8_t *b256_buf = calloc(b256_len, 1); - if (!b256_buf) { - LOG_ERROR("Unable to allocate memory"); - return ERROR_FAIL; - } + const size_t buf_len = DIV_ROUND_UP(buf_bitsize, 8); + memset(buf, 0, buf_len); /* Go through the zero-terminated buffer * of input digits (ASCII) */ - for (unsigned int i = 0; str[i]; i++) { - uint32_t tmp = str[i]; - if ((tmp >= '0') && (tmp <= '9')) { - tmp = (tmp - '0'); - } else if ((tmp >= 'a') && (tmp <= 'f')) { - tmp = (tmp - 'a' + 10); - } else if ((tmp >= 'A') && (tmp <= 'F')) { - tmp = (tmp - 'A' + 10); + for (; *str; str++) { + unsigned int tmp; + const char c = *str; + + if ((c >= '0') && (c <= '9')) { + tmp = c - '0'; + } else if ((c >= 'a') && (c <= 'f')) { + tmp = c - 'a' + 10; + } else if ((c >= 'A') && (c <= 'F')) { + tmp = c - 'A' + 10; } else { /* Characters other than [0-9,a-f,A-F] are invalid */ - free(b256_buf); return ERROR_INVALID_NUMBER; } - if (tmp >= radix) { - /* Encountered a digit that is invalid for the current radix */ - free(b256_buf); + /* Error on invalid digit for current radix */ + if (tmp >= radix) return ERROR_INVALID_NUMBER; - } - /* Add the current digit (tmp) to the intermediate result - * in b256_buf (base-256 digits) */ - for (unsigned int j = 0; j < b256_len; j++) { - tmp += (uint32_t)b256_buf[j] * radix; - b256_buf[j] = (uint8_t)(tmp & 0xFFu); + /* Add the current digit (tmp) to the intermediate result in buf */ + for (unsigned int j = 0; j < buf_len; j++) { + tmp += buf[j] * radix; + buf[j] = tmp & 0xFFu; tmp >>= 8; } - /* The b256_t buffer is large enough to contain the whole result. */ - assert(tmp == 0); + /* buf should be large enough to contain the whole result. */ + if (tmp != 0) + return ERROR_NUMBER_EXCEEDS_BUFFER; } - /* The result must not contain more bits than buf_bitsize. */ - /* Check the whole bytes: */ - for (unsigned int j = DIV_ROUND_UP(buf_bitsize, 8); j < b256_len; j++) { - if (b256_buf[j] != 0x0) { - free(b256_buf); - return ERROR_NUMBER_EXCEEDS_BUFFER; - } - } - /* Check the partial byte: */ + /* Check the partial most significant byte */ if (buf_bitsize % 8) { const uint8_t mask = 0xFFu << (buf_bitsize % 8); - if ((b256_buf[(buf_bitsize / 8)] & mask) != 0x0) { - free(b256_buf); + if ((buf[buf_len - 1] & mask) != 0x0) return ERROR_NUMBER_EXCEEDS_BUFFER; - } } - /* Copy the digits to the output buffer */ - uint8_t *buf = _buf; - for (unsigned int j = 0; j < DIV_ROUND_UP(buf_bitsize, 8); j++) { - if (j < b256_len) - buf[j] = b256_buf[j]; - else - buf[j] = 0; - } - - free(b256_buf); return ERROR_OK; } From ceae51ad74ba3a16be3e7ee2df4743a6df3cd097 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Thu, 1 Aug 2024 10:43:41 +0200 Subject: [PATCH 06/43] checkpatch: only report error on hit The Linux checkpatch script used by OpenOCD reports hits either as error, warning and check. Such classification is meaningful for Linux maintainers, but for OpenOCD Jenkins they are all considered as errors. Having such classification in the checkpatch report by Jenkins is misleading for developers that expect 'warnings' to be probably ignored by maintainers, while having no idea what 'checks' means. This patch flattens all the checkpatch reports to 'error' only. Checkpatch can trigger false positives. OpenOCD uses the tag Checkpatch-ignore: in the commit message to prevent Jenkins to report the error, as described in HACKING. Change-Id: I1d3164ba1f725c0763dfe362192ffa669b3856e6 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8424 Reviewed-by: Karl Palsson Tested-by: jenkins --- tools/scripts/checkpatch.pl | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl index 26589beab..a2f89eac8 100755 --- a/tools/scripts/checkpatch.pl +++ b/tools/scripts/checkpatch.pl @@ -2384,6 +2384,10 @@ sub show_type { sub report { my ($level, $type, $msg) = @_; + # OpenOCD specific: Begin: Flatten ERROR, WARNING and CHECK as ERROR + $level = 'ERROR'; + # OpenOCD specific: End + if (!show_type($type) || (defined $tst_only && $msg !~ /\Q$tst_only\E/)) { return 0; @@ -7638,9 +7642,15 @@ sub process { print report_dump(); if ($summary && !($clean == 1 && $quiet == 1)) { print "$filename " if ($summary_file); + if (!$OpenOCD) { print "total: $cnt_error errors, $cnt_warn warnings, " . (($check)? "$cnt_chk checks, " : "") . "$cnt_lines lines checked\n"; + } # $OpenOCD + # OpenOCD specific: Begin: Report total as errors + my $total = $cnt_error + $cnt_warn + $cnt_chk; + print "total: $total errors, $cnt_lines lines checked\n"; + # OpenOCD specific: End } if ($quiet == 0) { From 16429f6252c0d4b985d882e53ff476fe42fa0125 Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Thu, 1 Aug 2024 09:22:02 +0200 Subject: [PATCH 07/43] target/arm_cti: Use suitable data types While at it, fix some small coding style issues. Change-Id: Ifb8e78b55d29a06d69a3ce71d12d0040777aef13 Signed-off-by: Marc Schink Reviewed-on: https://review.openocd.org/c/openocd/+/8423 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/arm_cti.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c index 7637ad015..0ea853e49 100644 --- a/src/target/arm_cti.c +++ b/src/target/arm_cti.c @@ -196,9 +196,7 @@ static const struct { static int cti_find_reg_offset(const char *name) { - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(cti_names); i++) { + for (size_t i = 0; i < ARRAY_SIZE(cti_names); i++) { if (!strcmp(name, cti_names[i].label)) return cti_names[i].offset; } @@ -227,7 +225,7 @@ COMMAND_HANDLER(handle_cti_dump) struct adiv5_ap *ap = cti->ap; int retval = ERROR_OK; - for (int i = 0; (retval == ERROR_OK) && (i < (int)ARRAY_SIZE(cti_names)); i++) + for (size_t i = 0; (retval == ERROR_OK) && (i < ARRAY_SIZE(cti_names)); i++) retval = mem_ap_read_u32(ap, cti->spot.base + cti_names[i].offset, cti_names[i].p_val); @@ -237,7 +235,7 @@ COMMAND_HANDLER(handle_cti_dump) if (retval != ERROR_OK) return JIM_ERR; - for (int i = 0; i < (int)ARRAY_SIZE(cti_names); i++) + for (size_t i = 0; i < ARRAY_SIZE(cti_names); i++) command_print(CMD, "%8.8s (0x%04"PRIx32") 0x%08"PRIx32, cti_names[i].label, cti_names[i].offset, *cti_names[i].p_val); @@ -323,7 +321,6 @@ COMMAND_HANDLER(handle_cti_ack) int retval = arm_cti_ack_events(cti, 1 << event); - if (retval != ERROR_OK) return retval; @@ -437,6 +434,7 @@ static int cti_configure(struct jim_getopt_info *goi, struct arm_cti *cti) return JIM_OK; } + static int cti_create(struct jim_getopt_info *goi) { struct command_context *cmd_ctx; @@ -538,7 +536,6 @@ COMMAND_HANDLER(cti_handle_names) return ERROR_OK; } - static const struct command_registration cti_subcommand_handlers[] = { { .name = "create", From d3f50ea9145aa6cbe9232ab29736aebbd60763cd Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Fri, 7 Jun 2024 14:42:58 +0200 Subject: [PATCH 08/43] target: arm_adi_v5: add more CoreSight P/N Add part numbers for: - Cortex-A65AE, - Cortex-M52, - Cortex-M55, - Cortex-R52+, - STAR-MC1. Change-Id: I6282768896dd727e803a071139816494470744f1 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8319 Tested-by: jenkins --- src/target/arm_adi_v5.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 9129acecf..8a97d7a52 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1453,11 +1453,13 @@ static const struct dap_part_nums { { ARM_ID, 0x4af, "Cortex-A15 ROM", "(ROM Table)", }, { ARM_ID, 0x4b5, "Cortex-R5 ROM", "(ROM Table)", }, { ARM_ID, 0x4b8, "Cortex-R52 ROM", "(ROM Table)", }, + { ARM_ID, 0x4bd, "Cortex-R52+ ROM", "(ROM Table)", }, { ARM_ID, 0x4c0, "Cortex-M0+ ROM", "(ROM Table)", }, { ARM_ID, 0x4c3, "Cortex-M3 ROM", "(ROM Table)", }, { ARM_ID, 0x4c4, "Cortex-M4 ROM", "(ROM Table)", }, { ARM_ID, 0x4c7, "Cortex-M7 PPB ROM", "(Private Peripheral Bus ROM Table)", }, { ARM_ID, 0x4c8, "Cortex-M7 ROM", "(ROM Table)", }, + { ARM_ID, 0x4c9, "STAR ROM", "(ROM Table)", }, { ARM_ID, 0x4e0, "Cortex-A35 ROM", "(v7 Memory Map ROM Table)", }, { ARM_ID, 0x4e4, "Cortex-A76 ROM", "(ROM Table)", }, { ARM_ID, 0x906, "CoreSight CTI", "(Cross Trigger)", }, @@ -1499,6 +1501,7 @@ static const struct dap_part_nums { { ARM_ID, 0x9ae, "Cortex-A17 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9af, "Cortex-A15 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9b6, "Cortex-R52 PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", }, + { ARM_ID, 0x9bb, "Cortex-R52+ PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", }, { ARM_ID, 0x9b7, "Cortex-R7 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9d3, "Cortex-A53 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor Unit)", }, @@ -1533,6 +1536,10 @@ static const struct dap_part_nums { { ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", }, { ARM_ID, 0xd0c, "Neoverse N1", "(Debug Unit)", }, { ARM_ID, 0xd13, "Cortex-R52 Debug", "(Debug Unit)", }, + { ARM_ID, 0xd16, "Cortex-R52+ Debug", "(Debug Unit)", }, + { ARM_ID, 0xd21, "STAR Debug", "(Debug Unit)", }, + { ARM_ID, 0xd22, "Cortex-M55 Debug", "(Debug Unit)", }, + { ARM_ID, 0xd43, "Cortex-A65AE Debug", "(Debug Unit)", }, { ARM_ID, 0xd49, "Neoverse N2", "(Debug Unit)", }, { 0x017, 0x120, "TI SDTI", "(System Debug Trace Interface)", }, /* from OMAP3 memmap */ { 0x017, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */ @@ -1552,6 +1559,9 @@ static const struct dap_part_nums { { 0x1eb, 0x211, "Tegra 210 ROM", "(ROM Table)", }, { 0x1eb, 0x302, "Denver Debug", "(Debug Unit)", }, { 0x1eb, 0x402, "Denver PMU", "(Performance Monitor Unit)", }, + { 0x575, 0x132, "STAR SCS", "(System Control Space)", }, + { 0x575, 0x4d2, "Cortex-M52 ROM", "(ROM Table)", }, + { 0x575, 0xd24, "Cortex-M52 Debug", "(Debug Unit)", }, }; static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, unsigned int part_num) From 7eb9a48f2d53a773d822b7a2b93f53c09acb48d9 Mon Sep 17 00:00:00 2001 From: Peter Collingbourne Date: Tue, 30 Jul 2024 18:03:33 -0700 Subject: [PATCH 09/43] arm_adi_v5: Also clear sticky overrun bit on init Some targets start up with the sticky overrun bit set. On such targets we need to clear it in order to avoid subsequent incorrect reads. Change-Id: I3e939a9e092de6fcea9494d3179a3386aa1701d2 Signed-off-by: Peter Collingbourne Reviewed-on: https://review.openocd.org/c/openocd/+/8420 Reviewed-by: Antonio Borneo Tested-by: jenkins Reviewed-by: Tomas Vanek --- src/target/arm_adi_v5.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 8a97d7a52..3a5afc605 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -795,11 +795,12 @@ int dap_dp_init(struct adiv5_dap *dap) dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ; /* - * This write operation clears the sticky error bit in jtag mode only and - * is ignored in swd mode. It also powers-up system and debug domains in - * both jtag and swd modes, if not done before. + * This write operation clears the sticky error and overrun bits in jtag + * mode only and is ignored in swd mode. It also powers-up system and + * debug domains in both jtag and swd modes, if not done before. */ - retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat | SSTICKYERR); + retval = dap_queue_dp_write(dap, DP_CTRL_STAT, + dap->dp_ctrl_stat | SSTICKYERR | SSTICKYORUN); if (retval != ERROR_OK) return retval; From fc1e73b9cf4264350f445479a5a08833582e0cc3 Mon Sep 17 00:00:00 2001 From: Peter Collingbourne Date: Wed, 31 Jul 2024 19:02:42 -0700 Subject: [PATCH 10/43] arm_cti: Clean up the list of CTI registers Reduce the amount of boilerplate by moving cti_regs into its only user, making it a local variable and removing the now-redundant p_val pointer. Change-Id: I778cc1e960532fae1ac1a952c6ff19c54e578a5f Signed-off-by: Peter Collingbourne Reviewed-on: https://review.openocd.org/c/openocd/+/8421 Reviewed-by: Antonio Borneo Tested-by: jenkins --- src/target/arm_cti.c | 64 +++++++++++++++++++++----------------------- 1 file changed, 31 insertions(+), 33 deletions(-) diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c index 0ea853e49..422513e3e 100644 --- a/src/target/arm_cti.c +++ b/src/target/arm_cti.c @@ -157,41 +157,38 @@ int arm_cti_clear_channel(struct arm_cti *self, uint32_t channel) return arm_cti_write_reg(self, CTI_APPCLEAR, CTI_CHNL(channel)); } -static uint32_t cti_regs[28]; - static const struct { uint32_t offset; const char *label; - uint32_t *p_val; } cti_names[] = { - { CTI_CTR, "CTR", &cti_regs[0] }, - { CTI_GATE, "GATE", &cti_regs[1] }, - { CTI_INEN0, "INEN0", &cti_regs[2] }, - { CTI_INEN1, "INEN1", &cti_regs[3] }, - { CTI_INEN2, "INEN2", &cti_regs[4] }, - { CTI_INEN3, "INEN3", &cti_regs[5] }, - { CTI_INEN4, "INEN4", &cti_regs[6] }, - { CTI_INEN5, "INEN5", &cti_regs[7] }, - { CTI_INEN6, "INEN6", &cti_regs[8] }, - { CTI_INEN7, "INEN7", &cti_regs[9] }, - { CTI_INEN8, "INEN8", &cti_regs[10] }, - { CTI_OUTEN0, "OUTEN0", &cti_regs[11] }, - { CTI_OUTEN1, "OUTEN1", &cti_regs[12] }, - { CTI_OUTEN2, "OUTEN2", &cti_regs[13] }, - { CTI_OUTEN3, "OUTEN3", &cti_regs[14] }, - { CTI_OUTEN4, "OUTEN4", &cti_regs[15] }, - { CTI_OUTEN5, "OUTEN5", &cti_regs[16] }, - { CTI_OUTEN6, "OUTEN6", &cti_regs[17] }, - { CTI_OUTEN7, "OUTEN7", &cti_regs[18] }, - { CTI_OUTEN8, "OUTEN8", &cti_regs[19] }, - { CTI_TRIN_STATUS, "TRIN", &cti_regs[20] }, - { CTI_TROUT_STATUS, "TROUT", &cti_regs[21] }, - { CTI_CHIN_STATUS, "CHIN", &cti_regs[22] }, - { CTI_CHOU_STATUS, "CHOUT", &cti_regs[23] }, - { CTI_APPSET, "APPSET", &cti_regs[24] }, - { CTI_APPCLEAR, "APPCLR", &cti_regs[25] }, - { CTI_APPPULSE, "APPPULSE", &cti_regs[26] }, - { CTI_INACK, "INACK", &cti_regs[27] }, + { CTI_CTR, "CTR" }, + { CTI_GATE, "GATE" }, + { CTI_INEN0, "INEN0" }, + { CTI_INEN1, "INEN1" }, + { CTI_INEN2, "INEN2" }, + { CTI_INEN3, "INEN3" }, + { CTI_INEN4, "INEN4" }, + { CTI_INEN5, "INEN5" }, + { CTI_INEN6, "INEN6" }, + { CTI_INEN7, "INEN7" }, + { CTI_INEN8, "INEN8" }, + { CTI_OUTEN0, "OUTEN0" }, + { CTI_OUTEN1, "OUTEN1" }, + { CTI_OUTEN2, "OUTEN2" }, + { CTI_OUTEN3, "OUTEN3" }, + { CTI_OUTEN4, "OUTEN4" }, + { CTI_OUTEN5, "OUTEN5" }, + { CTI_OUTEN6, "OUTEN6" }, + { CTI_OUTEN7, "OUTEN7" }, + { CTI_OUTEN8, "OUTEN8" }, + { CTI_TRIN_STATUS, "TRIN" }, + { CTI_TROUT_STATUS, "TROUT" }, + { CTI_CHIN_STATUS, "CHIN" }, + { CTI_CHOU_STATUS, "CHOUT" }, + { CTI_APPSET, "APPSET" }, + { CTI_APPCLEAR, "APPCLR" }, + { CTI_APPPULSE, "APPPULSE" }, + { CTI_INACK, "INACK" }, }; static int cti_find_reg_offset(const char *name) @@ -224,10 +221,11 @@ COMMAND_HANDLER(handle_cti_dump) struct arm_cti *cti = CMD_DATA; struct adiv5_ap *ap = cti->ap; int retval = ERROR_OK; + uint32_t values[ARRAY_SIZE(cti_names)]; for (size_t i = 0; (retval == ERROR_OK) && (i < ARRAY_SIZE(cti_names)); i++) retval = mem_ap_read_u32(ap, - cti->spot.base + cti_names[i].offset, cti_names[i].p_val); + cti->spot.base + cti_names[i].offset, &values[i]); if (retval == ERROR_OK) retval = dap_run(ap->dap); @@ -237,7 +235,7 @@ COMMAND_HANDLER(handle_cti_dump) for (size_t i = 0; i < ARRAY_SIZE(cti_names); i++) command_print(CMD, "%8.8s (0x%04"PRIx32") 0x%08"PRIx32, - cti_names[i].label, cti_names[i].offset, *cti_names[i].p_val); + cti_names[i].label, cti_names[i].offset, values[i]); return JIM_OK; } From 941fa8538f2ad491f365a3818caa7534aaf29ea3 Mon Sep 17 00:00:00 2001 From: Peter Collingbourne Date: Wed, 31 Jul 2024 19:05:06 -0700 Subject: [PATCH 11/43] arm_cti: Add CTIDEVCTL to register list This is useful for setting a reset catch on a CPU that is being brought out of reset. Change-Id: Id8fe9bc3f75fd170f207f470a9f3b0faba7f24c1 Signed-off-by: Peter Collingbourne Reviewed-on: https://review.openocd.org/c/openocd/+/8422 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/arm_cti.c | 1 + src/target/arm_cti.h | 1 + 2 files changed, 2 insertions(+) diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c index 422513e3e..97d1fb34b 100644 --- a/src/target/arm_cti.c +++ b/src/target/arm_cti.c @@ -189,6 +189,7 @@ static const struct { { CTI_APPCLEAR, "APPCLR" }, { CTI_APPPULSE, "APPPULSE" }, { CTI_INACK, "INACK" }, + { CTI_DEVCTL, "DEVCTL" }, }; static int cti_find_reg_offset(const char *name) diff --git a/src/target/arm_cti.h b/src/target/arm_cti.h index cfcde6560..1513f0254 100644 --- a/src/target/arm_cti.h +++ b/src/target/arm_cti.h @@ -39,6 +39,7 @@ #define CTI_CHIN_STATUS 0x138 #define CTI_CHOU_STATUS 0x13C #define CTI_GATE 0x140 +#define CTI_DEVCTL 0x150 #define CTI_UNLOCK 0xFB0 #define CTI_CHNL(x) (1 << x) From 0bf3373e808a097fdf50fc04f987c26b35ddf09d Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Wed, 31 Jul 2024 09:35:03 +0200 Subject: [PATCH 12/43] target/breakpoints: Use 'unsigned int' for length Change-Id: I233efb5b18de5f043fdc976807437db0a94236d1 Signed-off-by: Marc Schink Reviewed-on: https://review.openocd.org/c/openocd/+/7056 Reviewed-by: Antonio Borneo Tested-by: jenkins --- src/target/breakpoints.c | 18 +++++++++--------- src/target/breakpoints.h | 13 +++++++------ src/target/target.c | 4 ++-- 3 files changed, 18 insertions(+), 17 deletions(-) diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c index c39a98057..2fbb69e07 100644 --- a/src/target/breakpoints.c +++ b/src/target/breakpoints.c @@ -38,7 +38,7 @@ static int bpwp_unique_id; static int breakpoint_add_internal(struct target *target, target_addr_t address, - uint32_t length, + unsigned int length, enum breakpoint_type type) { struct breakpoint *breakpoint = target->breakpoints; @@ -101,7 +101,7 @@ fail: static int context_breakpoint_add_internal(struct target *target, uint32_t asid, - uint32_t length, + unsigned int length, enum breakpoint_type type) { struct breakpoint *breakpoint = target->breakpoints; @@ -151,7 +151,7 @@ static int context_breakpoint_add_internal(struct target *target, static int hybrid_breakpoint_add_internal(struct target *target, target_addr_t address, uint32_t asid, - uint32_t length, + unsigned int length, enum breakpoint_type type) { struct breakpoint *breakpoint = target->breakpoints; @@ -207,7 +207,7 @@ static int hybrid_breakpoint_add_internal(struct target *target, int breakpoint_add(struct target *target, target_addr_t address, - uint32_t length, + unsigned int length, enum breakpoint_type type) { if (target->smp) { @@ -233,7 +233,7 @@ int breakpoint_add(struct target *target, int context_breakpoint_add(struct target *target, uint32_t asid, - uint32_t length, + unsigned int length, enum breakpoint_type type) { if (target->smp) { @@ -255,7 +255,7 @@ int context_breakpoint_add(struct target *target, int hybrid_breakpoint_add(struct target *target, target_addr_t address, uint32_t asid, - uint32_t length, + unsigned int length, enum breakpoint_type type) { if (target->smp) { @@ -500,7 +500,7 @@ struct breakpoint *breakpoint_find(struct target *target, target_addr_t address) } static int watchpoint_add_internal(struct target *target, target_addr_t address, - uint32_t length, enum watchpoint_rw rw, uint64_t value, uint64_t mask) + unsigned int length, enum watchpoint_rw rw, uint32_t value, uint32_t mask) { struct watchpoint *watchpoint = target->watchpoints; struct watchpoint **watchpoint_p = &target->watchpoints; @@ -556,7 +556,7 @@ bye: } LOG_TARGET_DEBUG(target, "added %s watchpoint at " TARGET_ADDR_FMT - " of length 0x%8.8" PRIx32 " (WPID: %d)", + " of length 0x%8.8x (WPID: %d)", watchpoint_rw_strings[(*watchpoint_p)->rw], (*watchpoint_p)->address, (*watchpoint_p)->length, @@ -566,7 +566,7 @@ bye: } int watchpoint_add(struct target *target, target_addr_t address, - uint32_t length, enum watchpoint_rw rw, uint64_t value, uint64_t mask) + unsigned int length, enum watchpoint_rw rw, uint64_t value, uint64_t mask) { if (target->smp) { struct target_list *head; diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h index 64c0ce2a5..0789267c7 100644 --- a/src/target/breakpoints.h +++ b/src/target/breakpoints.h @@ -26,7 +26,7 @@ enum watchpoint_rw { struct breakpoint { target_addr_t address; uint32_t asid; - int length; + unsigned int length; enum breakpoint_type type; bool is_set; unsigned int number; @@ -40,7 +40,7 @@ struct breakpoint { struct watchpoint { target_addr_t address; - uint32_t length; + unsigned int length; uint64_t mask; uint64_t value; enum watchpoint_rw rw; @@ -52,11 +52,12 @@ struct watchpoint { int breakpoint_clear_target(struct target *target); int breakpoint_add(struct target *target, - target_addr_t address, uint32_t length, enum breakpoint_type type); + target_addr_t address, unsigned int length, enum breakpoint_type type); int context_breakpoint_add(struct target *target, - uint32_t asid, uint32_t length, enum breakpoint_type type); + uint32_t asid, unsigned int length, enum breakpoint_type type); int hybrid_breakpoint_add(struct target *target, - target_addr_t address, uint32_t asid, uint32_t length, enum breakpoint_type type); + target_addr_t address, uint32_t asid, unsigned int length, + enum breakpoint_type type); int breakpoint_remove(struct target *target, target_addr_t address); int breakpoint_remove_all(struct target *target); @@ -70,7 +71,7 @@ static inline void breakpoint_hw_set(struct breakpoint *breakpoint, unsigned int int watchpoint_clear_target(struct target *target); int watchpoint_add(struct target *target, - target_addr_t address, uint32_t length, + target_addr_t address, unsigned int length, enum watchpoint_rw rw, uint64_t value, uint64_t mask); int watchpoint_remove(struct target *target, target_addr_t address); int watchpoint_remove_all(struct target *target); diff --git a/src/target/target.c b/src/target/target.c index 09396d878..b1a26f9e3 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -3950,7 +3950,7 @@ static int handle_bp_command_list(struct command_invocation *cmd) } static int handle_bp_command_set(struct command_invocation *cmd, - target_addr_t addr, uint32_t asid, uint32_t length, int hw) + target_addr_t addr, uint32_t asid, unsigned int length, int hw) { struct target *target = get_current_target(cmd->ctx); int retval; @@ -4067,7 +4067,7 @@ COMMAND_HANDLER(handle_wp_command) while (watchpoint) { char wp_type = (watchpoint->rw == WPT_READ ? 'r' : (watchpoint->rw == WPT_WRITE ? 'w' : 'a')); command_print(CMD, "address: " TARGET_ADDR_FMT - ", len: 0x%8.8" PRIx32 + ", len: 0x%8.8x" ", r/w/a: %c, value: 0x%8.8" PRIx64 ", mask: 0x%8.8" PRIx64, watchpoint->address, From ff22f78d4605d7037a70fa36232986c7396f2946 Mon Sep 17 00:00:00 2001 From: Parshintsev Anatoly Date: Thu, 4 Jul 2024 20:52:13 +0300 Subject: [PATCH 13/43] doc: document that breakpoints are disabled on step/resume OpenOCD disables breakpoints on step/resume if they match the current code position. This is a non-obvious behavior that should be documented Change-Id: Id762066569ec6452869a58dfcd9df88c8a14d6ab Signed-off-by: Parshintsev Anatoly Reviewed-on: https://review.openocd.org/c/openocd/+/8388 Tested-by: jenkins Reviewed-by: Antonio Borneo --- doc/openocd.texi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/doc/openocd.texi b/doc/openocd.texi index c78638276..db787fdb2 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -9273,11 +9273,19 @@ power consumption (because the CPU is needlessly clocked). @deffn {Command} {resume} [address] Resume the target at its current code position, or the optional @var{address} if it is provided. + +@b{NOTE:} targets are expected to temporary disable breakpoints +if they match the address of the current code position +or the @var{address} provided by user. @end deffn @deffn {Command} {step} [address] Single-step the target at its current code position, or the optional @var{address} if it is provided. + +@b{NOTE:} targets are expected to temporary disable breakpoints +if they match the address of the current code position +or the @var{address} provided by user. @end deffn @anchor{resetcommand} From 5cb184a732c998eed1d4e1a54c682d204f6f34d2 Mon Sep 17 00:00:00 2001 From: Richard Allen Date: Wed, 15 May 2024 12:29:05 -0500 Subject: [PATCH 14/43] target: fix profiler output on Windows Open output file in binary mode to disable EOL conversion on Windows (and sometimes cygwin depending on installation settings and path). Change-Id: I38276dd1af011ce5781b0264b7cbb08c32a1a2ad Signed-off-by: Richard Allen Reviewed-on: https://review.openocd.org/c/openocd/+/8278 Reviewed-by: Karl Palsson Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/target.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/target.c b/src/target/target.c index b1a26f9e3..9d1d2f550 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -4209,7 +4209,7 @@ static void write_gmon(uint32_t *samples, uint32_t sample_num, const char *filen uint32_t start_address, uint32_t end_address, struct target *target, uint32_t duration_ms) { uint32_t i; - FILE *f = fopen(filename, "w"); + FILE *f = fopen(filename, "wb"); if (!f) return; write_string(f, "gmon"); From e7a060090ee82bc6904338df54740c4331926ec4 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Tue, 16 Jan 2024 13:52:56 +0000 Subject: [PATCH 15/43] rtt: default the ID to "SEGGER RTT" Instead of making people type this in all the time, just default to "SEGGER RTT" so more things work out of the box. Change-Id: I147142cf0a755e635d3f66e047be2eb5049cf511 Signed-off-by: Karl Palsson Reviewed-on: https://review.openocd.org/c/openocd/+/8354 Tested-by: jenkins Reviewed-by: Antonio Borneo --- doc/openocd.texi | 5 +++-- src/rtt/tcl.c | 12 +++++++++--- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/doc/openocd.texi b/doc/openocd.texi index db787fdb2..dee431301 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -9541,11 +9541,12 @@ Channels are exposed via raw TCP/IP connections. One or more RTT servers can be assigned to each channel to make them accessible to an unlimited number of TCP/IP connections. -@deffn {Command} {rtt setup} address size ID +@deffn {Command} {rtt setup} address size [ID] Configure RTT for the currently selected target. Once RTT is started, OpenOCD searches for a control block with the identifier @var{ID} starting at the memory address @var{address} within the next @var{size} bytes. +ID defaults to the string "SEGGER RTT" @end deffn @deffn {Command} {rtt start} @@ -9588,7 +9589,7 @@ on the target device. @example resume -rtt setup 0x20000000 2048 "SEGGER RTT" +rtt setup 0x20000000 2048 rtt start rtt server start 9090 0 diff --git a/src/rtt/tcl.c b/src/rtt/tcl.c index 2b8822fce..bae71b6ce 100644 --- a/src/rtt/tcl.c +++ b/src/rtt/tcl.c @@ -19,8 +19,14 @@ COMMAND_HANDLER(handle_rtt_setup_command) { struct rtt_source source; - if (CMD_ARGC != 3) + const char *DEFAULT_ID = "SEGGER RTT"; + const char *selected_id; + if (CMD_ARGC < 2 || CMD_ARGC > 3) return ERROR_COMMAND_SYNTAX_ERROR; + if (CMD_ARGC == 2) + selected_id = DEFAULT_ID; + else + selected_id = CMD_ARGV[2]; source.find_cb = &target_rtt_find_control_block; source.read_cb = &target_rtt_read_control_block; @@ -38,7 +44,7 @@ COMMAND_HANDLER(handle_rtt_setup_command) rtt_register_source(source, get_current_target(CMD_CTX)); - if (rtt_setup(address, size, CMD_ARGV[2]) != ERROR_OK) + if (rtt_setup(address, size, selected_id) != ERROR_OK) return ERROR_FAIL; return ERROR_OK; @@ -218,7 +224,7 @@ static const struct command_registration rtt_subcommand_handlers[] = { .handler = handle_rtt_setup_command, .mode = COMMAND_ANY, .help = "setup RTT", - .usage = "
" + .usage = "
[ID]" }, { .name = "start", From e09bb72da50c9a9878565af23ee8d5465c11526d Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Mon, 5 Feb 2024 11:51:24 +0100 Subject: [PATCH 16/43] target/cortex_m: add DSCSR_CDSKEY bit definition Needed e.g. for flash drivers handling secure mode. Signed-off-by: Tomas Vanek Change-Id: If6cb49609140d06a73bcf2e446b6a634d6326e80 Reviewed-on: https://review.openocd.org/c/openocd/+/8435 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/cortex_m.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 726fca290..144f24560 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -150,6 +150,7 @@ struct cortex_m_part_info { #define VC_CORERESET BIT(0) /* DCB_DSCSR bit and field definitions */ +#define DSCSR_CDSKEY BIT(17) #define DSCSR_CDS BIT(16) /* NVIC registers */ From 4680d6ebdf142f9dd1acdc439d4e146ed36a290b Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 25 Aug 2024 15:38:07 +0200 Subject: [PATCH 17/43] binarybuffer: str_to_buf(): align prefix to TCL syntax Integer values are interpreted by TCL as decimal, binary, octal or hexadecimal if prepended with '0d', '0b', '0o' or '0x' respectively. The case of '0' prefix has been interpreted as octal till TCL 8.6 but is interpreted as part of a decimal number by JimTCL and from TCL 9. Align str_to_buf() to latest TCL syntax by: - addding support for '0d', '0b' and '0o' prefix; - dropping support for '0' prefix. Change-Id: I708ef72146d75b7bf429df329a0269cf48700a44 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8465 Tested-by: jenkins Reviewed-by: Jan Matyas --- src/helper/binarybuffer.c | 77 ++++++++++++++++----------------------- 1 file changed, 32 insertions(+), 45 deletions(-) diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 509f24f0b..423739a9d 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -192,50 +192,12 @@ char *buf_to_hex_str(const void *_buf, unsigned buf_len) return str; } -static bool str_has_hex_prefix(const char *s) -{ - /* Starts with "0x" or "0X" */ - return (s[0] == '0') && (s[1] == 'x' || s[1] == 'X'); -} - -static bool str_has_octal_prefix(const char *s) -{ - /* - starts with '0', - * - has at least two characters, and - * - the second character is not 'x' or 'X' */ - return (s[0] == '0') && (s[1] != '\0') && (s[1] != 'x') && (s[1] != 'X'); -} - -/** - * Try to identify the radix of the number by looking at its prefix. - * No further validation of the number is preformed. +/* + * TCL standard prefix is '0b', '0o', '0d' or '0x' respectively for binary, + * octal, decimal or hexadecimal. + * The prefix '0' is interpreted by TCL <= 8.6 as octal, but is ignored and + * interpreted as part of a decimal number by JimTCL and by TCL >= 9. */ -static unsigned int str_radix_guess(const char *str) -{ - if (str_has_hex_prefix(str)) - return 16; - - if (str_has_octal_prefix(str)) - return 8; - - /* Otherwise assume a decimal number. */ - return 10; -} - -/** Strip leading "0x" or "0X" from hex numbers or "0" from octal numbers. */ -static const char *str_strip_number_prefix(const char *str, unsigned int radix) -{ - switch (radix) { - case 16: - return str + 2; - case 8: - return str + 1; - case 10: - default: - return str; - } -} - int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize) { assert(str); @@ -243,9 +205,34 @@ int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize) assert(buf_bitsize > 0); uint8_t *buf = _buf; - unsigned int radix = str_radix_guess(str); + unsigned int radix = 10; /* default when no prefix */ - str = str_strip_number_prefix(str, radix); + if (str[0] == '0') { + switch (str[1]) { + case 'b': + case 'B': + radix = 2; + str += 2; + break; + case 'o': + case 'O': + radix = 8; + str += 2; + break; + case 'd': + case 'D': + radix = 10; + str += 2; + break; + case 'x': + case 'X': + radix = 16; + str += 2; + break; + default: + break; + } + } const size_t str_len = strlen(str); if (str_len == 0) From e01e180f6248590348bad5c354c6b4e0cf1a956a Mon Sep 17 00:00:00 2001 From: Marcus Nilsson Date: Mon, 6 May 2024 11:40:00 +0200 Subject: [PATCH 18/43] drivers/cmsis_dap: Fix buffer overflow in cmsis_dap_hid_open() Use mbstowcs() to get required length of wide character string and include space for terminating null wide character. Change-Id: I668de6f0acc9b3ec5aca033d870dd9ef354f9077 Signed-off-by: Marcus Nilsson Reviewed-on: https://review.openocd.org/c/openocd/+/8232 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Tomas Vanek --- src/jtag/drivers/cmsis_dap_usb_hid.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c index 98ccc3e38..aeec685b9 100644 --- a/src/jtag/drivers/cmsis_dap_usb_hid.c +++ b/src/jtag/drivers/cmsis_dap_usb_hid.c @@ -121,8 +121,12 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p break; if (cur_dev->serial_number) { - size_t len = (strlen(serial) + 1) * sizeof(wchar_t); - wchar_t *wserial = malloc(len); + size_t len = mbstowcs(NULL, serial, 0) + 1; + wchar_t *wserial = malloc(len * sizeof(wchar_t)); + if (!wserial) { + LOG_ERROR("unable to allocate serial number buffer"); + return ERROR_FAIL; + } mbstowcs(wserial, serial, len); if (wcscmp(wserial, cur_dev->serial_number) == 0) { From ca72d23c3b9df2ffa9e18cb5e3b4ccc2194ff329 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Ho=C5=A1ek?= Date: Sun, 25 Aug 2024 13:54:15 +0200 Subject: [PATCH 19/43] doc: fix stm32l4x option_write usage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit stm32l4x option_write works like stm32h7x option_write, i.e. expects the value to write after reg_offset and optionally reg_mask after the value. Change-Id: I57fb4fb1dbf7f43fe063b48f4db2dd5f2ef0ade0 Signed-off-by: Ondřej Hošek Reviewed-on: https://review.openocd.org/c/openocd/+/8464 Tested-by: jenkins Reviewed-by: Tomas Vanek Reviewed-by: Antonio Borneo --- doc/openocd.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/openocd.texi b/doc/openocd.texi index dee431301..2e48d8e20 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -8075,7 +8075,7 @@ The above example will read out the FLASH_OPTR register which contains the RDP option byte, Watchdog configuration, BOR level etc. @end deffn -@deffn {Command} {stm32l4x option_write} num reg_offset reg_mask +@deffn {Command} {stm32l4x option_write} num reg_offset value [reg_mask] Write an option byte register of the stm32l4x device. The @var{num} parameter is a value shown by @command{flash banks}, @var{reg_offset} is the register offset of the Option byte to write, and @var{reg_mask} is the mask From 7e271c91516ce106ceec6af952b9e02641b203cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Ho=C5=A1ek?= Date: Sun, 25 Aug 2024 23:50:07 +0200 Subject: [PATCH 20/43] flash/stm32l4x: option_write usage: mask is optional MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If no mask is given, the value in the option register is replaced completely. If a mask is set, only those bits that are set in the mask are transferred into the option register; the others remain unchanged. Change-Id: If488a10f92d7dcc0e0f192aef5e67c255fd529c3 Signed-off-by: Ondřej Hošek Reviewed-on: https://review.openocd.org/c/openocd/+/8466 Reviewed-by: Antonio Borneo Tested-by: jenkins --- src/flash/nor/stm32l4x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index bb6e9ef04..9235dd787 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -2622,7 +2622,7 @@ static const struct command_registration stm32l4_exec_command_handlers[] = { .name = "option_write", .handler = stm32l4_handle_option_write_command, .mode = COMMAND_EXEC, - .usage = "bank_id reg_offset value mask", + .usage = "bank_id reg_offset value [mask]", .help = "Write device option bit fields with provided value.", }, { From 324469da57f1b061674ac45a3b1f7fbc3b11fdfe Mon Sep 17 00:00:00 2001 From: Adam Novak Date: Sun, 25 Aug 2024 22:51:22 -0400 Subject: [PATCH 21/43] cpld: update warning to suggest virtex2 refresh virtex2 refresh replaced virtex2 program, but the even older programming commands like xc6s_program still suggest the old, now-removed program command. This changes the warnings to suggest the command that is still there, and also adds some indication that you will need to use the .pld name instead of the .tap name. Change-Id: I292da62a95a9b414c69cdb1bba8a28dfd16a7336 Signed-off-by: Adam Novak Reviewed-on: https://review.openocd.org/c/openocd/+/8468 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Daniel Anselmi --- tcl/cpld/xilinx-xc6s.cfg | 4 ++-- tcl/cpld/xilinx-xc7.cfg | 2 +- tcl/cpld/xilinx-xcu.cfg | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg index 92b260577..862c4aa89 100644 --- a/tcl/cpld/xilinx-xc6s.cfg +++ b/tcl/cpld/xilinx-xc6s.cfg @@ -35,7 +35,7 @@ set XC6S_JSTART 0x0c set XC6S_BYPASS 0x3f proc xc6s_program {tap} { - echo "DEPRECATED! use 'virtex2 program ...' not 'xc6s_program'" + echo "DEPRECATED! use 'virtex2 refresh XXXX.pld' not 'xc6s_program'" global XC6S_JSHUTDOWN XC6S_JPROGRAM XC6S_JSTART XC6S_BYPASS irscan $tap $XC6S_JSHUTDOWN irscan $tap $XC6S_JPROGRAM @@ -45,7 +45,7 @@ proc xc6s_program {tap} { #xtp038 and xc3sprog approach proc xc6s_program_iprog {tap} { - echo "DEPRECATED! use 'virtex2 program ...' not 'xc6s_program_iprog'" + echo "DEPRECATED! use 'virtex2 refresh XXXX.pld' not 'xc6s_program_iprog'" global XC6S_JSHUTDOWN XC6S_JSTART XC6S_BYPASS XC6S_CFG_IN irscan $tap $XC6S_JSHUTDOWN runtest 16 diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg index f5b073374..6f8f4ae5c 100644 --- a/tcl/cpld/xilinx-xc7.cfg +++ b/tcl/cpld/xilinx-xc7.cfg @@ -49,7 +49,7 @@ set XC7_JSTART 0x0c set XC7_BYPASS 0x3f proc xc7_program {tap} { - echo "DEPRECATED! use 'virtex2 program ...' not 'xc7_program'" + echo "DEPRECATED! use 'virtex2 refresh XXXX.pld' not 'xc7_program'" global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS irscan $tap $XC7_JSHUTDOWN irscan $tap $XC7_JPROGRAM diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg index 4d7f26c88..63a67da20 100644 --- a/tcl/cpld/xilinx-xcu.cfg +++ b/tcl/cpld/xilinx-xcu.cfg @@ -109,7 +109,7 @@ set XCU_JSTART 0x0c set XCU_BYPASS 0x3f proc xcu_program {tap} { - echo "DEPRECATED! use 'virtex2 program ...' not 'xcu_program'" + echo "DEPRECATED! use 'virtex2 refresh XXXX.pld' not 'xcu_program'" global XCU_JSHUTDOWN XCU_JPROGRAM XCU_JSTART XCU_BYPASS irscan $tap $XCU_JSHUTDOWN irscan $tap $XCU_JPROGRAM From f9b2a1a2bdfb6ff2f12281b2827b9c3b5278b41b Mon Sep 17 00:00:00 2001 From: Parshintsev Anatoly Date: Tue, 20 Aug 2024 16:07:17 +0300 Subject: [PATCH 22/43] jtag_vpi: fix signed/unsigned comparison jtag_vpi_stableclocks Change-Id: Id2b00fbc8ba627f4465c109fbde6e010faaff9d2 Signed-off-by: Parshintsev Anatoly Reviewed-on: https://review.openocd.org/c/openocd/+/8462 Reviewed-by: Jan Matyas Reviewed-by: Antonio Borneo Tested-by: jenkins Reviewed-by: Tomas Vanek --- src/jtag/drivers/jtag_vpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c index 5745a2cd0..a19060c2a 100644 --- a/src/jtag/drivers/jtag_vpi.c +++ b/src/jtag/drivers/jtag_vpi.c @@ -461,7 +461,7 @@ static int jtag_vpi_stableclocks(unsigned int num_cycles) unsigned int cycles_remain = num_cycles; int nb_bits; int retval; - const int CYCLES_ONE_BATCH = sizeof(tms_bits) * 8; + const unsigned int CYCLES_ONE_BATCH = sizeof(tms_bits) * 8; /* use TMS=1 in TAP RESET state, TMS=0 in all other stable states */ memset(&tms_bits, (tap_get_state() == TAP_RESET) ? 0xff : 0x00, sizeof(tms_bits)); From 75b418faa7b9849a118c86ccac019d2d9ea235af Mon Sep 17 00:00:00 2001 From: Adam Novak Date: Sun, 25 Aug 2024 22:36:29 -0400 Subject: [PATCH 23/43] tcl/board: Support for Digilent Anvyl board Support Digilent Anvyl board JTAG chain Change-Id: I6fb52284429af6c98c19411fc8bc3ab983dfa9b8 Signed-off-by: Adam Novak Reviewed-on: https://review.openocd.org/c/openocd/+/8467 Tested-by: jenkins Reviewed-by: Antonio Borneo --- tcl/board/digilent_anvyl.cfg | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 tcl/board/digilent_anvyl.cfg diff --git a/tcl/board/digilent_anvyl.cfg b/tcl/board/digilent_anvyl.cfg new file mode 100644 index 000000000..e82002877 --- /dev/null +++ b/tcl/board/digilent_anvyl.cfg @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Digilent Anvyl with Xilinx Spartan-6 FPGA +# https://digilent.com/reference/programmable-logic/anvyl/start +# Almost the same setup as the Digilent Nexys Video board or the Digilent HS1 +# adapter. +adapter driver ftdi +adapter speed 30000 + +ftdi device_desc "Digilent USB Device" +ftdi vid_pid 0x0403 0x6010 + +# channel 0 is the JTAG channel +# channel 1 is a user serial channel to pins on the FPGA +ftdi channel 0 + +# just TCK TDI TDO TMS, no reset +ftdi layout_init 0x0088 0x008b +reset_config none + +# Enable sampling on falling edge for high JTAG speeds. +ftdi tdo_sample_edge falling + +transport select jtag + +source [find cpld/xilinx-xc6s.cfg] +source [find cpld/jtagspi.cfg] From cbed09ee9bdbba27ca93f5883b79595f7e9d347d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 23 Aug 2024 01:29:02 +0200 Subject: [PATCH 24/43] tcl/target: Make sure R-Car Gen3 _targets variable is global The _targets has to be global as it is accessed at the end of this file. This is already the case for setup_a5x {}, assure it is the same way for setup_crx{} . Without this change, the _targets at the end of this file is empty in case the Cortex-R is the boot core, fix this. Change-Id: I4979e3125ec7d93bbd56eee0096ae1d9c5f6a565 Signed-off-by: Marek Vasut Reviewed-on: https://review.openocd.org/c/openocd/+/8470 Tested-by: jenkins Reviewed-by: Antonio Borneo --- tcl/target/renesas_rcar_gen3.cfg | 1 + 1 file changed, 1 insertion(+) diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg index 8dc0e7a0d..73b3003a9 100644 --- a/tcl/target/renesas_rcar_gen3.cfg +++ b/tcl/target/renesas_rcar_gen3.cfg @@ -159,6 +159,7 @@ proc setup_a5x {core_name dbgbase ctibase num boot} { proc setup_crx {core_name dbgbase ctibase num boot} { global _CHIPNAME global _DAPNAME + global _targets for { set _core 0 } { $_core < $num } { incr _core } { set _TARGETNAME $_CHIPNAME.$core_name set _CTINAME $_TARGETNAME.cti From f0bad430df8e9fe0ff5323756a19ad2baa52e9f6 Mon Sep 17 00:00:00 2001 From: Parshintsev Anatoly Date: Fri, 30 Aug 2024 22:45:07 +0300 Subject: [PATCH 25/43] rtos/hwthread: fix threadid generation Looks like 7f2d3e2925 introduced a regression by incorrectly assigning threads. The title of the commit message says that the intention was to "derive threadid from SMP index", this is not what happens, however. Instead threadid is assigned based on an index of all examined targets in an SMP group. This introduces two logical errors. *Error 1* Here is the code that assigns threads to harts: ``` foreach_smp_target(head, target->smp_targets) { struct target *curr = head->target; if (!target_was_examined(curr)) continue; threadid_t tid = threads_found + 1; hwthread_fill_thread(rtos, curr, threads_found, tid); ``` Now, imagine a situation when we have two targets: `target.A` and `target.B`. Let's assume that `target.A` is NOT examined (it could be under reset, for example). Then, according to the algorithm when assigning thread identifiers `target.B` will be assigned tid of 1. The respected inferior on GDB side will be called `Thread 1`. Now, imagine that `target.A` activates and succefully examined - OpenOCD will re-assign thread identifiers. And now on GDB side `Thread 1` will represent the state of `target.A`. Which is incorrect. *Error 2* The reverse mapping between `threadid` and targets does not take the state of targets into account. ``` static struct target * hwthread_find_thread(struct target *target, threadid_t thread_id) ... threadid_t tid = 1; foreach_smp_target(head, target->smp_targets) { if (thread_id == tid) head->target; ++tid; } ``` So the constructed mapping is incorrect. Since in example above `Thread 1` will get mapped to `target.A`. *Solution:* It seems that threadids should be assigned based on position of the thread in an smp group disregarding the target state. Change-Id: Ib93b7ed3bb03696afdf56a105b333e22b9ec69b5 Signed-off-by: Parshintsev Anatoly Reviewed-on: https://review.openocd.org/c/openocd/+/8471 Reviewed-by: Antonio Borneo Reviewed-by: Mark Zhuang Tested-by: jenkins Reviewed-by: Evgeniy Naydanov --- src/rtos/hwthread.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c index 748e71c3d..4fe841902 100644 --- a/src/rtos/hwthread.c +++ b/src/rtos/hwthread.c @@ -133,7 +133,7 @@ static int hwthread_update_threads(struct rtos *rtos) if (!target_was_examined(curr)) continue; - threadid_t tid = threads_found + 1; + threadid_t tid = threadid_from_target(curr); hwthread_fill_thread(rtos, curr, threads_found, tid); /* find an interesting thread to set as current */ From 0efedd7bd7e1531a47028d9b32e9406502a59ca7 Mon Sep 17 00:00:00 2001 From: Marcus Nilsson Date: Wed, 7 Aug 2024 11:24:04 +0200 Subject: [PATCH 26/43] drivers/jlink: Print serial numbers when multiple devices are connected When multiple jlink programmers are connected and no specific serial or USB location is specified, print out the detected serial numbers. Signed-off-by: Marcus Nilsson Change-Id: I280da2b85363f7054c5f466637120427cadcf7d1 Reviewed-on: https://review.openocd.org/c/openocd/+/8356 Reviewed-by: Mark Zhuang Reviewed-by: Antonio Borneo Tested-by: jenkins --- src/jtag/drivers/jlink.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index a94f3a4ab..1b2fb4e30 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -564,6 +564,20 @@ static int jlink_open_device(uint32_t ifaces, bool *found_device) if (!use_serial_number && !use_usb_address && !use_usb_location && num_devices > 1) { LOG_ERROR("Multiple devices found, specify the desired device"); + LOG_INFO("Found devices:"); + for (size_t i = 0; devs[i]; i++) { + uint32_t serial; + ret = jaylink_device_get_serial_number(devs[i], &serial); + if (ret == JAYLINK_ERR_NOT_AVAILABLE) { + continue; + } else if (ret != JAYLINK_OK) { + LOG_WARNING("jaylink_device_get_serial_number() failed: %s", + jaylink_strerror(ret)); + continue; + } + LOG_INFO("Device %zu serial: %" PRIu32, i, serial); + } + jaylink_free_devices(devs, true); jaylink_exit(jayctx); return ERROR_JTAG_INIT_FAILED; From 6f9b1ee521203f0d43b7d84e671ba4e32bd3e599 Mon Sep 17 00:00:00 2001 From: Jun Yan Date: Sat, 31 Aug 2024 19:28:46 +0800 Subject: [PATCH 27/43] tcl/interface/ftdi: add support for Sipeed USB-JTAG/TTL Debugger Sipeed USB-JTAG/TTL Debugger is a compact FT2232D-based JTAG adapter. Change-Id: Ibc9075723f47cd9b49ba4bb39e3d292e7d80bed7 Signed-off-by: Jun Yan Reviewed-on: https://review.openocd.org/c/openocd/+/8472 Reviewed-by: Antonio Borneo Tested-by: jenkins --- .../ftdi/sipeed-usb-jtag-debugger.cfg | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 tcl/interface/ftdi/sipeed-usb-jtag-debugger.cfg diff --git a/tcl/interface/ftdi/sipeed-usb-jtag-debugger.cfg b/tcl/interface/ftdi/sipeed-usb-jtag-debugger.cfg new file mode 100644 index 000000000..8a804eca6 --- /dev/null +++ b/tcl/interface/ftdi/sipeed-usb-jtag-debugger.cfg @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Sipeed USB-JTAG/TTL RISC-V Debugger +# +# https://www.seeedstudio.com/Sipeed-USB-JTAG-TTL-RISC-V-Debugger-p-2910.html +# + +adapter driver ftdi +ftdi device_desc "Dual RS232" +ftdi vid_pid 0x0403 0x6010 +ftdi channel 0 + +# Every pin set as high impedance except TCK, TDI, TDO, TMS and RST +ftdi layout_init 0x0028 0x002b + +transport select jtag + +# nSRST defined on pin RST of the Debugger (pin ADBUS5 [AD5] on the FT2232D chip) +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 From d35399b00e5693d5b6f91208b0f52e5d710d086f Mon Sep 17 00:00:00 2001 From: daniellizewski Date: Fri, 23 Aug 2024 08:31:04 -0400 Subject: [PATCH 28/43] src/flash/nor/kinetis.c: Fixed flash bank write gap Flash banks created in kinetis_create_missing_banks did not populate bank->minimal_write_gap. The default value of 0 was interpreted as FLASH_WRITE_CONTINUOUS. This created unnecessary large padding if your binary had a gap in the populated flash. It also caused flash errors when loading with GDB because the erroneously padded pages were not erased first. Tested using an S32k148 using s32k.cfg. Change-Id: I9b7af698e29ac2c4f5fc8ecd82fa7f4b1a0d43f1 Signed-off-by: daniellizewski Reviewed-on: https://review.openocd.org/c/openocd/+/8463 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Tomas Vanek --- src/flash/nor/kinetis.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index fee36444e..2d0a75334 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -1038,6 +1038,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) bank->target = k_chip->target; bank->driver = &kinetis_flash; bank->default_padded_value = bank->erased_value = 0xff; + bank->minimal_write_gap = FLASH_WRITE_GAP_SECTOR; snprintf(name, sizeof(name), "%s.%s%s", base_name, class, num); From 1aa759dbb9dc1e3bc60ad5f86ddafc793c9d0e0b Mon Sep 17 00:00:00 2001 From: Alexandre Bailon Date: Fri, 29 Mar 2024 21:13:17 +0100 Subject: [PATCH 29/43] flash/nor: Update cc26xx flash driver to support cc13x2x7 This updates the flash driver to support more than one bank. This is required to support the cc1352p7 which has two banks. This only have been tested on a cc1352p7. The loader has been built using a gcc-arm-none-eabi-4_8-2014q3 toolchain. Change-Id: Ia813421ececd96d6e2fd4dae910ad60fcc3d3c88 Signed-off-by: Alexandre Bailon Reviewed-on: https://review.openocd.org/c/openocd/+/8192 Tested-by: jenkins Reviewed-by: Vaishnav M A Reviewed-by: Antonio Borneo --- contrib/loaders/flash/cc26xx/cc26x0_algo.inc | 488 +++++++++---------- contrib/loaders/flash/cc26xx/cc26x2_algo.inc | 486 +++++++++--------- contrib/loaders/flash/cc26xx/flash.c | 113 +++-- contrib/loaders/flash/cc26xx/flash.h | 40 ++ contrib/loaders/flash/cc26xx/hw_regs.h | 21 + 5 files changed, 616 insertions(+), 532 deletions(-) diff --git a/contrib/loaders/flash/cc26xx/cc26x0_algo.inc b/contrib/loaders/flash/cc26xx/cc26x0_algo.inc index 2246a3670..d20d9be44 100644 --- a/contrib/loaders/flash/cc26xx/cc26x0_algo.inc +++ b/contrib/loaders/flash/cc26xx/cc26x0_algo.inc @@ -1,249 +1,248 @@ /* Autogenerated with ../../../../src/helper/bin2char.sh */ 0x08,0xb5,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0xdf,0xf8,0x1c,0xd0,0x07,0x48, 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+0x0e,0x33,0xcd,0xab,0x34,0x12,0x6d,0xe6,0xec,0xde,0x05,0x00,0x0b,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, @@ -307,8 +306,9 @@ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x18,0x0f,0x00,0x20,0xc1,0x00,0x00,0x20,0x91,0x00,0x00,0x20,0x00,0x00,0x00,0x00, -0x95,0x0d,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x0f,0x00,0x20,0x61,0x00,0x00,0x20, +0x35,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x6d,0x0c,0x00,0x20,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, diff --git a/contrib/loaders/flash/cc26xx/flash.c b/contrib/loaders/flash/cc26xx/flash.c index affd02955..641054943 100644 --- a/contrib/loaders/flash/cc26xx/flash.c +++ b/contrib/loaders/flash/cc26xx/flash.c @@ -42,7 +42,7 @@ typedef uint32_t (*flash_sector_erase_pntr_t) (uint32_t); * ******************************************************************************/ static void issue_fsm_command(flash_state_command_t command); -static void enable_sectors_for_write(void); +static void enable_sectors_for_write(uint32_t); static uint32_t scale_cycle_values(uint32_t specified_timing, uint32_t scale_value); static void set_write_mode(void); @@ -80,42 +80,51 @@ uint32_t flash_bank_erase(bool force_precondition) uint32_t error_return; uint32_t sector_address; uint32_t reg_val; + uint32_t bank_no; + uint32_t top_bank_start_addr = (HWREG(FLASH_BASE + FLASH_O_FCFG_B1_START) & + FLASH_FCFG_B1_START_B1_START_ADDR_M) + >> FLASH_FCFG_B1_START_B1_START_ADDR_S; - /* Enable all sectors for erase. */ - enable_sectors_for_write(); + for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) { + /* Enable all sectors for erase. */ + enable_sectors_for_write(bank_no); - /* Clear the Status register. */ - issue_fsm_command(FAPI_CLEAR_STATUS); + /* Clear the Status register. */ + issue_fsm_command(FAPI_CLEAR_STATUS); - /* Enable erase of all sectors and enable precondition if required. */ - reg_val = HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE); - HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE; - HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0x00000000; - HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0x00000000; - if (force_precondition) - HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |= - FLASH_FSM_ST_MACHINE_DO_PRECOND; - HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE; - - /* Issue the bank erase command to the FSM. */ - issue_fsm_command(FAPI_ERASE_BANK); - - /* Wait for erase to finish. */ - while (flash_check_fsm_for_ready() == FAPI_STATUS_FSM_BUSY) - ; - - /* Update status. */ - error_return = flash_check_fsm_for_error(); - - /* Disable sectors for erase. */ - flash_disable_sectors_for_write(); - - /* Set configured precondition mode since it may have been forced on. */ - if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) { + /* Enable erase of all sectors and enable precondition if required. */ + reg_val = HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE); HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE; - HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &= - ~FLASH_FSM_ST_MACHINE_DO_PRECOND; + HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0x00000000; + HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0x00000000; + if (force_precondition) + HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |= + FLASH_FSM_ST_MACHINE_DO_PRECOND; HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE; + + // Write address to FADDR register. + HWREG(FLASH_BASE + FLASH_O_FADDR) = ADDR_OFFSET + (bank_no * top_bank_start_addr); + + /* Issue the bank erase command to the FSM. */ + issue_fsm_command(FAPI_ERASE_BANK); + + /* Wait for erase to finish. */ + while (flash_check_fsm_for_ready() == FAPI_STATUS_FSM_BUSY) + ; + + /* Update status. */ + error_return = flash_check_fsm_for_error(); + + /* Set configured precondition mode since it may have been forced on. */ + if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) { + HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE; + HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &= + ~FLASH_FSM_ST_MACHINE_DO_PRECOND; + HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE; + } + + if (error_return != FAPI_STATUS_SUCCESS) + break; } /* Program security data to default values in the customer configuration */ @@ -128,6 +137,9 @@ uint32_t flash_bank_erase(bool force_precondition) CCFG_SIZE_SECURITY); } + /* Disable sectors for erase. */ + flash_disable_sectors_for_write(); + /* Return status of operation. */ return error_return; } @@ -161,23 +173,34 @@ uint32_t flash_program(uint8_t *data_buffer, uint32_t address, uint32_t count) ******************************************************************************/ void flash_disable_sectors_for_write(void) { + uint32_t bank_no; + /* Configure flash back to read mode */ set_read_mode(); - /* Disable Level 1 Protection. */ - HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS; + for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) { - /* Disable all sectors for erase and programming. */ - HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000; + /* Select flash bank. */ + HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no; - /* Enable Level 1 Protection. */ - HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0; + /* Disable Level 1 Protection. */ + HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS; - /* Protect sectors from sector erase. */ - HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE; - HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF; - HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF; - HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE; + /* Disable all sectors for erase and programming. */ + HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000; + + /* Enable Level 1 Protection. */ + HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0; + + /* Protect sectors from sector erase. */ + HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE; + HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF; + HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF; + HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE; + } + + // Select bank 0 + HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x0; } /****************************************************************************** @@ -214,7 +237,7 @@ static void issue_fsm_command(flash_state_command_t command) * the FLASH_O_FSM_SECTOR1 register. * ******************************************************************************/ -static void enable_sectors_for_write(void) +static void enable_sectors_for_write(uint32_t bank_no) { /* Trim flash module for program/erase operation. */ trim_for_write(); @@ -223,7 +246,7 @@ static void enable_sectors_for_write(void) set_write_mode(); /* Select flash bank. */ - HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x00; + HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no; /* Disable Level 1 Protection. */ HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS; diff --git a/contrib/loaders/flash/cc26xx/flash.h b/contrib/loaders/flash/cc26xx/flash.h index 07acf26f2..21df89bd6 100644 --- a/contrib/loaders/flash/cc26xx/flash.h +++ b/contrib/loaders/flash/cc26xx/flash.h @@ -246,6 +246,46 @@ static inline uint32_t flash_check_fsm_for_ready(void) return FAPI_STATUS_FSM_READY; } +/****************************************************************************** + * + * Get the number of banks + * + * This function returns the number of bank of the flash. + * + * Returns the number of banks + * + ******************************************************************************/ +static inline uint32_t flash_bank_count(void) +{ + uint32_t bank_count; + + bank_count = (HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) & + FLASH_FCFG_BANK_MAIN_NUM_BANK_M) >> + FLASH_FCFG_BANK_MAIN_NUM_BANK_S; + + return bank_count; +} + +/****************************************************************************** + * + * Get the size of the bank. + * + * This function returns the size of the main bank in number of bytes. + * + * Returns the flash size in number of bytes. + * + ******************************************************************************/ +static inline uint8_t flash_bank_width(void) +{ + uint8_t bank_width; + + bank_width = (uint8_t)(((HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) & + FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M) >> + FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S) >> 3); + + return bank_width; +} + /****************************************************************************** * * Erase a flash sector. diff --git a/contrib/loaders/flash/cc26xx/hw_regs.h b/contrib/loaders/flash/cc26xx/hw_regs.h index 78c81be24..753db17c5 100644 --- a/contrib/loaders/flash/cc26xx/hw_regs.h +++ b/contrib/loaders/flash/cc26xx/hw_regs.h @@ -116,6 +116,10 @@ /* FMC Sequential Pump Information */ #define FLASH_O_FSEQPMP 0x000020A8 +#define FLASH_O_FADDR 0x00002110 + +#define FLASH_O_FWPWRITE0 0x00002120 + /* FMC FSM Command */ #define FLASH_O_FSM_CMD 0x0000220C @@ -179,9 +183,14 @@ /* FMC FSM Sector Erased 2 */ #define FLASH_O_FSM_SECTOR2 0x000022C4 +#define FLASH_O_FCFG_BANK 0x00002400 + /* FMC Flash Bank 0 Starting Address */ #define FLASH_O_FCFG_B0_START 0x00002410 +/* FMC Flash Bank 1 Starting Address */ +#define FLASH_O_FCFG_B1_START 0x00002414 + /* FMC Flash Bank 0 Sector Size 0 */ #define FLASH_O_FCFG_B0_SSIZE0 0x00002430 @@ -1353,4 +1362,16 @@ * 1: DCDC and GLDO are bypassed and an external regulator supplies VDDR */ #define AON_PMCTL_PWRCTL_EXT_REG_MODE 0x00000002 +/* Field: [3:0] MAIN_NUM_BANK */ +#define FLASH_FCFG_BANK_MAIN_NUM_BANK_M 0x0000000F +#define FLASH_FCFG_BANK_MAIN_NUM_BANK_S 0 + +/* Field: [23:0] B1_START_ADDR */ +#define FLASH_FCFG_B1_START_B1_START_ADDR_M 0x00FFFFFF +#define FLASH_FCFG_B1_START_B1_START_ADDR_S 0 + +/* Field: [15:4] MAIN_BANK_WIDTH */ +#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M 0x0000FFF0 +#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S 4 + #endif /* #ifndef OPENOCD_LOADERS_FLASH_CC26XX_HW_REGS_H */ From 13f1bcbe90c51ab9200a0d10de24111459b0e626 Mon Sep 17 00:00:00 2001 From: Alexandre Bailon Date: Fri, 29 Mar 2024 21:14:29 +0100 Subject: [PATCH 30/43] tcl/target: Add support of CC1352P7 This adds support for TI CC13X2X7 / CC26X2X7 family. For further details, see https://www.ti.com/lit/ug/swcu192/swcu192.pdf. Change-Id: Ifd9b505716ddf0abbdd00f617e50a93a3d4fbe6a Signed-off-by: Alexandre Bailon Reviewed-on: https://review.openocd.org/c/openocd/+/8193 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Vaishnav M A --- tcl/target/ti_cc26x2x7.cfg | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 tcl/target/ti_cc26x2x7.cfg diff --git a/tcl/target/ti_cc26x2x7.cfg b/tcl/target/ti_cc26x2x7.cfg new file mode 100644 index 000000000..91c1a8059 --- /dev/null +++ b/tcl/target/ti_cc26x2x7.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Texas Instruments CC26x2 - ARM Cortex-M4 +# +# http://www.ti.com +# + +set CHIPNAME cc26x2x7 +set JRC_TAPID 0x1BB7702F +set WORKAREASIZE 0x7000 + +source [find target/ti_cc26x0.cfg] From 760dd1f3a8720e5e58b96e4920fd17bd8a1a7bf6 Mon Sep 17 00:00:00 2001 From: Alexandre Bailon Date: Fri, 29 Mar 2024 21:14:54 +0100 Subject: [PATCH 31/43] tcl/boards: Add support of LP-CC1352P7 board This adds support of TI LP-CC1352P7 evaluation kit. For further details, see https://www.ti.com/tool/LP-CC1352P7. Change-Id: I4aba160dbf4920febb7897458d06450e7d134147 Signed-off-by: Alexandre Bailon Reviewed-on: https://review.openocd.org/c/openocd/+/8194 Reviewed-by: Antonio Borneo Tested-by: jenkins Reviewed-by: Vaishnav M A --- tcl/board/ti_cc26x2x7_launchpad.cfg | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 tcl/board/ti_cc26x2x7_launchpad.cfg diff --git a/tcl/board/ti_cc26x2x7_launchpad.cfg b/tcl/board/ti_cc26x2x7_launchpad.cfg new file mode 100644 index 000000000..9e6e72e89 --- /dev/null +++ b/tcl/board/ti_cc26x2x7_launchpad.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# TI CC1352P7 LaunchPad Evaluation Kit +# +source [find interface/xds110.cfg] +adapter speed 5500 +transport select jtag +source [find target/ti_cc26x2x7.cfg] From e5a2001a3331dfc669f9969fd9a5f661579ccad9 Mon Sep 17 00:00:00 2001 From: Parshintsev Anatoly Date: Sat, 3 Aug 2024 22:10:57 +0300 Subject: [PATCH 32/43] binarybuffer: add asserts for the number of requested bits for get/set functions Change-Id: Ieca5b4e690c9713ad60dc9d8c223c2d64822e2f5 Signed-off-by: Parshintsev Anatoly Reviewed-on: https://review.openocd.org/c/openocd/+/8427 Tested-by: jenkins Reviewed-by: Tomas Vanek Reviewed-by: Jan Matyas Reviewed-by: Antonio Borneo --- src/helper/binarybuffer.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h index 103a48c5c..df4199837 100644 --- a/src/helper/binarybuffer.h +++ b/src/helper/binarybuffer.h @@ -34,6 +34,7 @@ static inline void buf_set_u32(uint8_t *_buffer, unsigned first, unsigned num, uint32_t value) { + assert(num >= 1 && num <= 32); uint8_t *buffer = _buffer; if ((num == 32) && (first == 0)) { @@ -64,6 +65,7 @@ static inline void buf_set_u32(uint8_t *_buffer, static inline void buf_set_u64(uint8_t *_buffer, unsigned first, unsigned num, uint64_t value) { + assert(num >= 1 && num <= 64); uint8_t *buffer = _buffer; if ((num == 32) && (first == 0)) { @@ -102,6 +104,7 @@ static inline void buf_set_u64(uint8_t *_buffer, static inline uint32_t buf_get_u32(const uint8_t *_buffer, unsigned first, unsigned num) { + assert(num >= 1 && num <= 32); const uint8_t *buffer = _buffer; if ((num == 32) && (first == 0)) { @@ -131,6 +134,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer, static inline uint64_t buf_get_u64(const uint8_t *_buffer, unsigned first, unsigned num) { + assert(num >= 1 && num <= 64); const uint8_t *buffer = _buffer; if ((num == 32) && (first == 0)) { From e5276bb945b518c7e9df5b7e069cc6bf45a96c35 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 1 Sep 2024 15:01:56 +0200 Subject: [PATCH 33/43] rtos: use target_buffer_get_u32() Simplify the code using the target endianness independent API. Change-Id: I39f720d0db9cf24eb41d7f359e4321bbc2045658 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8474 Tested-by: jenkins Reviewed-by: Tomas Vanek --- src/rtos/rtos_standard_stackings.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c index 5478080cf..99cd1540f 100644 --- a/src/rtos/rtos_standard_stackings.c +++ b/src/rtos/rtos_standard_stackings.c @@ -160,9 +160,7 @@ target_addr_t rtos_cortex_m_stack_align(struct target *target, new_stack_ptr = stack_ptr - stacking->stack_growth_direction * stacking->stack_registers_size; - xpsr = (target->endianness == TARGET_LITTLE_ENDIAN) ? - le_to_h_u32(&stack_data[xpsr_offset]) : - be_to_h_u32(&stack_data[xpsr_offset]); + xpsr = target_buffer_get_u32(target, &stack_data[xpsr_offset]); if ((xpsr & ALIGN_NEEDED) != 0) { LOG_DEBUG("XPSR(0x%08" PRIx32 ") indicated stack alignment was necessary\r\n", xpsr); From 930ec2f439f2f7d81894a292f0df5a56f9ff0ce8 Mon Sep 17 00:00:00 2001 From: Richard Allen Date: Wed, 31 Jul 2024 20:53:52 -0500 Subject: [PATCH 34/43] target/espressif: add profiling function for ESP32-S3 Use the TRAX interface DEBUGPC if available. Otherwise use default stop-and-go profiling. ESP32-S3, before this patch: Internal: 8 samples/second FT2232H: 12 samples/second After this patch: Internal: 18ksamples/second FT2232H: 100ksamples/second Change-Id: I681f0bccf4263c1e24f38be511e3b3aec8bf4d60 Signed-off-by: Richard Allen Reviewed-on: https://review.openocd.org/c/openocd/+/8431 Reviewed-by: Erhan Kurubas Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Ian Thompson Reviewed-by: Yurii Shutkin --- src/target/espressif/esp32s3.c | 1 + src/target/espressif/esp_xtensa.c | 72 +++++++++++++++++++++++++ src/target/espressif/esp_xtensa.h | 3 ++ src/target/xtensa/xtensa_debug_module.h | 2 + 4 files changed, 78 insertions(+) diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c index 22e1630e1..2afb4b009 100644 --- a/src/target/espressif/esp32s3.c +++ b/src/target/espressif/esp32s3.c @@ -421,4 +421,5 @@ struct target_type esp32s3_target = { .deinit_target = esp_xtensa_target_deinit, .commands = esp32s3_command_handlers, + .profiling = esp_xtensa_profiling, }; diff --git a/src/target/espressif/esp_xtensa.c b/src/target/espressif/esp_xtensa.c index 11895d23b..9b57f345e 100644 --- a/src/target/espressif/esp_xtensa.c +++ b/src/target/espressif/esp_xtensa.c @@ -179,3 +179,75 @@ int esp_xtensa_breakpoint_remove(struct target *target, struct breakpoint *break return xtensa_breakpoint_remove(target, breakpoint); /* flash breakpoints will be handled in another patch */ } + +int esp_xtensa_profiling(struct target *target, uint32_t *samples, + uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds) +{ + struct timeval timeout, now; + struct xtensa *xtensa = target_to_xtensa(target); + int retval = ERROR_OK; + int res; + + /* Vary samples per pass to avoid sampling a periodic function periodically */ + #define MIN_PASS 200 + #define MAX_PASS 1000 + + gettimeofday(&timeout, NULL); + timeval_add_time(&timeout, seconds, 0); + + uint8_t buf[sizeof(uint32_t) * MAX_PASS]; + + /* Capture one sample to verify the register is present and working */ + xtensa_queue_dbg_reg_read(xtensa, XDMREG_DEBUGPC, buf); + res = xtensa_dm_queue_execute(&xtensa->dbg_mod); + if (res != ERROR_OK) { + LOG_TARGET_INFO(target, "Failed to read DEBUGPC, fallback to stop-and-go"); + return target_profiling_default(target, samples, max_num_samples, num_samples, seconds); + } else if (buf[0] == 0 && buf[1] == 0 && buf[2] == 0 && buf[3] == 0) { + LOG_TARGET_INFO(target, "NULL DEBUGPC, fallback to stop-and-go"); + return target_profiling_default(target, samples, max_num_samples, num_samples, seconds); + } + + LOG_TARGET_INFO(target, "Starting XTENSA DEBUGPC profiling. Sampling as fast as we can..."); + + /* Make sure the target is running */ + target_poll(target); + if (target->state == TARGET_HALTED) + retval = target_resume(target, 1, 0, 0, 0); + + if (retval != ERROR_OK) { + LOG_TARGET_ERROR(target, "Error while resuming target"); + return retval; + } + + uint32_t sample_count = 0; + + for (;;) { + uint32_t remaining = max_num_samples - sample_count; + uint32_t this_pass = rand() % (MAX_PASS - MIN_PASS) + MIN_PASS; + this_pass = this_pass > remaining ? remaining : this_pass; + for (uint32_t i = 0; i < this_pass; ++i) + xtensa_queue_dbg_reg_read(xtensa, XDMREG_DEBUGPC, buf + i * sizeof(uint32_t)); + res = xtensa_dm_queue_execute(&xtensa->dbg_mod); + if (res != ERROR_OK) { + LOG_TARGET_ERROR(target, "Failed to read DEBUGPC!"); + return res; + } + + for (uint32_t i = 0; i < this_pass; ++i) { + uint32_t sample32 = buf_get_u32(buf + i * sizeof(uint32_t), 0, 32); + samples[sample_count++] = sample32; + } + gettimeofday(&now, NULL); + if (sample_count >= max_num_samples || timeval_compare(&now, &timeout) > 0) { + LOG_TARGET_INFO(target, "Profiling completed. %" PRIu32 " samples.", sample_count); + break; + } + } + + *num_samples = sample_count; + return retval; + + #undef MIN_PASS + #undef MAX_PASS +} diff --git a/src/target/espressif/esp_xtensa.h b/src/target/espressif/esp_xtensa.h index 00f67a370..56c903f60 100644 --- a/src/target/espressif/esp_xtensa.h +++ b/src/target/espressif/esp_xtensa.h @@ -37,6 +37,9 @@ void esp_xtensa_queue_tdi_idle(struct target *target); int esp_xtensa_breakpoint_add(struct target *target, struct breakpoint *breakpoint); int esp_xtensa_breakpoint_remove(struct target *target, struct breakpoint *breakpoint); int esp_xtensa_poll(struct target *target); +int esp_xtensa_profiling(struct target *target, uint32_t *samples, + uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds); + int esp_xtensa_on_halt(struct target *target); #endif /* OPENOCD_TARGET_ESP_XTENSA_H */ diff --git a/src/target/xtensa/xtensa_debug_module.h b/src/target/xtensa/xtensa_debug_module.h index 495da2a64..8391a9638 100644 --- a/src/target/xtensa/xtensa_debug_module.h +++ b/src/target/xtensa/xtensa_debug_module.h @@ -75,6 +75,7 @@ enum xtensa_dm_reg { XDMREG_DELAYCNT, XDMREG_MEMADDRSTART, XDMREG_MEMADDREND, + XDMREG_DEBUGPC,/*Unsupported, undocumented, may not be present*/ XDMREG_EXTTIMELO, XDMREG_EXTTIMEHI, XDMREG_TRAXRSVD48, @@ -184,6 +185,7 @@ struct xtensa_dm_reg_offsets { { .nar = 0x07, .apb = 0x001c }, /* XDMREG_DELAYCNT */ \ { .nar = 0x08, .apb = 0x0020 }, /* XDMREG_MEMADDRSTART */ \ { .nar = 0x09, .apb = 0x0024 }, /* XDMREG_MEMADDREND */ \ + { .nar = 0x0f, .apb = 0x003c }, /* XDMREG_DEBUGPC */ \ { .nar = 0x10, .apb = 0x0040 }, /* XDMREG_EXTTIMELO */ \ { .nar = 0x11, .apb = 0x0044 }, /* XDMREG_EXTTIMEHI */ \ { .nar = 0x12, .apb = 0x0048 }, /* XDMREG_TRAXRSVD48 */ \ From 1dc3d7e8febb8bdd74bdcbefeb0e0f7b54817f10 Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Wed, 14 Aug 2024 09:15:46 +0200 Subject: [PATCH 35/43] flash/nor/sfdp: expose SFDP_MAGIC in sfdp.h Could be handy for dummy transfer size detection. Signed-off-by: Tomas Vanek Change-Id: Ibb485218f6c2ff9066910bb58be0fc614b77add3 Reviewed-on: https://review.openocd.org/c/openocd/+/8438 Reviewed-by: Antonio Borneo Tested-by: jenkins Reviewed-by: Andreas Bolsch --- src/flash/nor/sfdp.c | 1 - src/flash/nor/sfdp.h | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c index 5bfb54194..b411a3b63 100644 --- a/src/flash/nor/sfdp.c +++ b/src/flash/nor/sfdp.c @@ -12,7 +12,6 @@ #include "spi.h" #include "sfdp.h" -#define SFDP_MAGIC 0x50444653 #define SFDP_ACCESS_PROT 0xFF #define SFDP_BASIC_FLASH 0xFF00 #define SFDP_4BYTE_ADDR 0xFF84 diff --git a/src/flash/nor/sfdp.h b/src/flash/nor/sfdp.h index 1c9af326b..7a7af9931 100644 --- a/src/flash/nor/sfdp.h +++ b/src/flash/nor/sfdp.h @@ -7,6 +7,8 @@ #ifndef OPENOCD_FLASH_NOR_SFDP_H #define OPENOCD_FLASH_NOR_SFDP_H +#define SFDP_MAGIC 0x50444653 + /* per JESD216D 'addr' is *byte* based but must be word aligned, * 'buffer' is word based, word aligned and always little-endian encoded, * in the flash, 'addr_len' is 3 or 4, 'dummy' ***usually*** 8 From ea28f96aa99b3dd6cbed6143fda844427e71832a Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Wed, 14 Aug 2024 09:17:36 +0200 Subject: [PATCH 36/43] flash/nor/sfdp, stmqspi: use native type for buffer size Two different sizes uint8_t and uint32_t was used for this value without a good reason. Signed-off-by: Tomas Vanek Change-Id: I4bb60cc5397ffd0d37e7034e3930e62793140c8d Reviewed-on: https://review.openocd.org/c/openocd/+/8439 Reviewed-by: Andreas Bolsch Tested-by: jenkins --- src/flash/nor/sfdp.c | 2 +- src/flash/nor/sfdp.h | 2 +- src/flash/nor/stmqspi.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c index b411a3b63..917f1626f 100644 --- a/src/flash/nor/sfdp.c +++ b/src/flash/nor/sfdp.c @@ -99,7 +99,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev, goto err; for (k = 0; k < nph; k++) { - uint8_t words = (pheaders[k].revision >> 24) & 0xFF; + unsigned int words = (pheaders[k].revision >> 24) & 0xFF; uint16_t id = (((pheaders[k].ptr) >> 16) & 0xFF00) | (pheaders[k].revision & 0xFF); uint32_t ptr = pheaders[k].ptr & 0xFFFFFF; diff --git a/src/flash/nor/sfdp.h b/src/flash/nor/sfdp.h index 7a7af9931..0d43519f6 100644 --- a/src/flash/nor/sfdp.h +++ b/src/flash/nor/sfdp.h @@ -18,7 +18,7 @@ * * buffer contents is supposed to be returned in ***host*** endianness */ typedef int (*read_sfdp_block_t)(struct flash_bank *bank, uint32_t addr, - uint32_t words, uint32_t *buffer); + unsigned int words, uint32_t *buffer); extern int spi_sfdp(struct flash_bank *bank, struct flash_device *dev, read_sfdp_block_t read_sfdp_block); diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c index a1e1d3411..df58f6c55 100644 --- a/src/flash/nor/stmqspi.c +++ b/src/flash/nor/stmqspi.c @@ -1807,7 +1807,7 @@ err: /* Read SFDP parameter block */ static int read_sfdp_block(struct flash_bank *bank, uint32_t addr, - uint32_t words, uint32_t *buffer) + unsigned int words, uint32_t *buffer) { struct target *target = bank->target; struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv; @@ -1848,7 +1848,7 @@ static int read_sfdp_block(struct flash_bank *bank, uint32_t addr, } } - LOG_DEBUG("%s: addr=0x%08" PRIx32 " words=0x%08" PRIx32 " dummy=%u", + LOG_DEBUG("%s: addr=0x%08" PRIx32 " words=0x%08x dummy=%u", __func__, addr, words, *dummy); /* Abort any previous operation */ From 96924dda01b964799fc1a78524fc24d7bd2142dc Mon Sep 17 00:00:00 2001 From: Jiafei Pan Date: Tue, 18 Jun 2024 12:15:21 +0800 Subject: [PATCH 37/43] target: add imx8mp and evk board support Have verified with JLink: openocd -f interface/jlink.cfg -f board/nxp_imx8mp-evk.cfg -c "gdb_breakpoint_override hard" Change-Id: I74f8766b8c5334ca5758c2672c283ff2405de4c3 Signed-off-by: Jiafei Pan Reviewed-on: https://review.openocd.org/c/openocd/+/8352 Reviewed-by: Antonio Borneo Tested-by: jenkins --- tcl/board/nxp_imx8mp-evk.cfg | 24 +++++++++++++++++ tcl/target/imx8mp.cfg | 52 ++++++++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 tcl/board/nxp_imx8mp-evk.cfg create mode 100644 tcl/target/imx8mp.cfg diff --git a/tcl/board/nxp_imx8mp-evk.cfg b/tcl/board/nxp_imx8mp-evk.cfg new file mode 100644 index 000000000..4e101d454 --- /dev/null +++ b/tcl/board/nxp_imx8mp-evk.cfg @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# configuration file for NXP IMX8M Plus EVK +# + +# only JTAG supported +transport select jtag + +# set a safe JTAG clock speed, can be overridden +adapter speed 1000 + +# default JTAG configuration has only SRST and no TRST +reset_config srst_only srst_push_pull + +# delay after SRST goes inactive +adapter srst delay 70 + + +# board has an i.MX8MP with 4 Cortex-A55 cores +set CHIPNAME imx8mp +set CHIPCORES 4 + +# source SoC configuration +source [find target/imx8mp.cfg] diff --git a/tcl/target/imx8mp.cfg b/tcl/target/imx8mp.cfg new file mode 100644 index 000000000..bddbcfd20 --- /dev/null +++ b/tcl/target/imx8mp.cfg @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# configuration file for NXP i.MX8M Plus SoCs +# +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx8m +} + +if { [info exists CHIPCORES] } { + set _cores $CHIPCORES +} else { + set _cores 1 +} + +# CoreSight Debug Access Port +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x5ba00477 +} + +# the DAP tap +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \ + -expected-id $_DAP_TAPID + +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +set _TARGETNAME $_CHIPNAME.a53 +set _CTINAME $_CHIPNAME.cti + +set DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000} +set CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000} + +for { set _core 0 } { $_core < $_cores } { incr _core } { + + cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \ + -baseaddr [lindex $CTIBASE $_core] + + target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \ + -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core +} + +# declare the auxiliary Cortex-M7 core on AP #4 +target create ${_CHIPNAME}.m7 cortex_m -dap ${_CHIPNAME}.dap -ap-num 4 + +# AHB-AP for direct access to soc bus +target create ${_CHIPNAME}.ahb mem_ap -dap ${_CHIPNAME}.dap -ap-num 0 + +# default target is A53 core 0 +targets $_TARGETNAME.0 From 0261cd995888e83f6099f0d94a5e9a96a47bc609 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Mon, 2 Sep 2024 11:02:19 +0200 Subject: [PATCH 38/43] checkpatch: check for SPDX in linker scripts Current script does not enforces the check for the SPDX tag in the linker scripts. Add the extension '.ld' in the OpenOCD specific part. Change-Id: I1cb6bc52e9dd86d99a26393085c7e2c9e8bac11f Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/8475 Tested-by: jenkins --- tools/scripts/checkpatch.pl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl index a2f89eac8..59a3eed12 100755 --- a/tools/scripts/checkpatch.pl +++ b/tools/scripts/checkpatch.pl @@ -3730,6 +3730,8 @@ sub process { # OpenOCD specific: Begin } elsif ($realfile =~ /\.(am|cfg|tcl)$/) { $comment = '#'; + } elsif ($realfile =~ /\.(ld)$/) { + $comment = '/*'; # OpenOCD specific: End } From 84d196673e1d24898c588423870ea0f0ab39d9be Mon Sep 17 00:00:00 2001 From: liangzhen Date: Mon, 2 Sep 2024 20:21:48 +0800 Subject: [PATCH 39/43] tcl/target: Add SpacemiT Key Stone K1 config Add basic connection details with Key Stone K1 Change-Id: I3e51d4194cfd3b7fe8ae395e0aca0fa4799dfb73 Signed-off-by: liangzhen Reviewed-on: https://review.openocd.org/c/openocd/+/8361 Reviewed-by: Antonio Borneo Tested-by: jenkins --- tcl/target/spacemit-k1.cfg | 74 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 tcl/target/spacemit-k1.cfg diff --git a/tcl/target/spacemit-k1.cfg b/tcl/target/spacemit-k1.cfg new file mode 100644 index 000000000..ef5d7833d --- /dev/null +++ b/tcl/target/spacemit-k1.cfg @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# SpacemiT Key Stone K1 target +# +# https://www.spacemit.com/key-stone-k1 +# + +transport select jtag + +adapter speed 2000 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME k1 +} + +if { [info exists CORES] } { + set _cores $CORES +} else { + set _cores 1 +} + +if { [info exists SECJTAG] } { + jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000E21 +} else { + jtag newtap pre unknown -irlen 1 -expected-id 0x00000000 -disable + jtag configure pre.unknown -event tap-enable "" + + jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000E21 -disable + jtag configure $_CHIPNAME.cpu -event tap-enable "" + + jtag newtap post unknown -irlen 9 -expected-id 0x08501C0D -ignore-version + + jtag configure post.unknown -event setup { + global _CHIPNAME + + irscan post.unknown 0x98 + drscan post.unknown 16 0xa + + jtag tapenable pre.unknown + jtag tapenable $_CHIPNAME.cpu + } +} + +set _TARGETNAME $_CHIPNAME.cpu +set DBGBASE {0x0 0x400} +set _smp_command "target smp" + +for { set _core 0 } { $_core < $_cores } { incr _core } { + target create $_TARGETNAME.$_core riscv -chain-position $_TARGETNAME \ + -coreid [expr {$_core % 4}] -dbgbase [lindex $DBGBASE [expr {$_core / 4}]] + + if { [expr {$_core % 4}] == 0 } { + $_TARGETNAME.$_core configure -rtos hwthread + } + + set _smp_command "$_smp_command $_TARGETNAME.$_core" +} + +eval $_smp_command + +set _SPEED 8000 + +$_TARGETNAME.0 configure -event examine-start { + adapter speed $_SPEED + puts [ adapter speed ] +} + +foreach t [target names] { + # $t riscv set_mem_access sysbus progbuf + $t riscv set_mem_access progbuf +} From a9ba96f94a31da50b7323fbb42ae749027b0357b Mon Sep 17 00:00:00 2001 From: Ian Thompson Date: Tue, 3 Sep 2024 14:32:42 -0700 Subject: [PATCH 40/43] doc/xtensa: update supported architecture list - Xtensa LX8 is fully supported in addition to prior LX and NX cores. Change-Id: I2f3f0a21ce1518b3ced6d241f0ab84c65af64423 Signed-off-by: Ian Thompson Reviewed-on: https://review.openocd.org/c/openocd/+/8362 Reviewed-by: Antonio Borneo Tested-by: jenkins --- doc/openocd.texi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/openocd.texi b/doc/openocd.texi index 2e48d8e20..e8a1f33b5 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -11611,8 +11611,8 @@ on @url{https://www.nxp.com}. @subsection Xtensa Configuration Commands @deffn {Config Command} {xtensa xtdef} (@option{LX}|@option{NX}) -Configure the Xtensa target architecture. Currently, Xtensa support is limited -to LX6, LX7, and NX cores. +Configure the Xtensa target architecture to LX or NX. Currently, Xtensa LX support +is limited to LX6 and newer cores. @end deffn @deffn {Config Command} {xtensa xtopt} option value From 63ca9670321c1c057ee32e9925826f9f8c836005 Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Wed, 3 Jul 2024 15:16:27 +0200 Subject: [PATCH 41/43] README: Use proper Markdown syntax The README file contains a mixture of Markdown and non-Markdown syntax. Refurbish the document and use only Markdown syntax according to the specification in [1]. [1] https://www.markdownguide.org/ Change-Id: If58f4e2971dc798a03a78841226804ab1f2d33c8 Signed-off-by: Marc Schink Reviewed-on: https://review.openocd.org/c/openocd/+/8387 Reviewed-by: Antonio Borneo Tested-by: jenkins --- README | 140 +++++++++++++++++++++++++-------------------------------- 1 file changed, 60 insertions(+), 80 deletions(-) diff --git a/README b/README index 7d3f10def..950c71f70 100644 --- a/README +++ b/README @@ -1,5 +1,4 @@ -Welcome to OpenOCD! -=================== +# Welcome to OpenOCD! OpenOCD provides on-chip programming and debugging support with a layered architecture of JTAG interface and TAP support including: @@ -26,33 +25,33 @@ This README file contains an overview of the following topics: - packaging tips. -============================ -Quickstart for the impatient -============================ +# Quickstart for the impatient If you have a popular board then just start OpenOCD with its config, e.g.: - openocd -f board/stm32f4discovery.cfg + openocd -f board/stm32f4discovery.cfg If you are connecting a particular adapter with some specific target, you need to source both the jtag interface and the target configs, e.g.: - openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \ - -f target/ti_calypso.cfg +``` +openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \ + -f target/ti_calypso.cfg +``` - openocd -f interface/stlink.cfg -c "transport select hla_swd" \ - -f target/stm32l0.cfg +``` +openocd -f interface/stlink.cfg -c "transport select hla_swd" \ + -f target/stm32l0.cfg +``` After OpenOCD startup, connect GDB with - (gdb) target extended-remote localhost:3333 + (gdb) target extended-remote localhost:3333 -===================== -OpenOCD Documentation -===================== +# OpenOCD Documentation In addition to the in-tree documentation, the latest manuals may be viewed online at the following URLs: @@ -71,35 +70,34 @@ by subscribing to the OpenOCD developer mailing list: openocd-devel@lists.sourceforge.net -Building the OpenOCD Documentation ----------------------------------- +## Building the OpenOCD Documentation By default the OpenOCD build process prepares documentation in the -"Info format" and installs it the standard way, so that "info openocd" +"Info format" and installs it the standard way, so that `info openocd` can access it. Additionally, the OpenOCD User's Guide can be produced in the following different formats: - # If PDFVIEWER is set, this creates and views the PDF User Guide. - make pdf && ${PDFVIEWER} doc/openocd.pdf +If `PDFVIEWER` is set, this creates and views the PDF User Guide. - # If HTMLVIEWER is set, this creates and views the HTML User Guide. - make html && ${HTMLVIEWER} doc/openocd.html/index.html + make pdf && ${PDFVIEWER} doc/openocd.pdf + +If `HTMLVIEWER` is set, this creates and views the HTML User Guide. + + make html && ${HTMLVIEWER} doc/openocd.html/index.html The OpenOCD Developer Manual contains information about the internal architecture and other details about the code: - # NB! make sure doxygen is installed, type doxygen --version - make doxygen && ${HTMLVIEWER} doxygen/index.html +Note: make sure doxygen is installed, type doxygen --version + + make doxygen && ${HTMLVIEWER} doxygen/index.html -================== -Supported hardware -================== +# Supported hardware -JTAG adapters -------------- +## JTAG adapters AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835, Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP, @@ -116,8 +114,7 @@ sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster, USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe, Xverve. -Debug targets -------------- +## Debug targets ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M), FA526, Feroceon/Dragonite, XScale. @@ -125,8 +122,7 @@ ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64), ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8, Xtensa. -Flash drivers -------------- +## Flash drivers ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI, DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI, @@ -140,12 +136,9 @@ TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF, XMC1xxx, XMC4xxx. -================== -Installing OpenOCD -================== +# Installing OpenOCD -A Note to OpenOCD Users ------------------------ +## A Note to OpenOCD Users If you would rather be working "with" OpenOCD rather than "on" it, your operating system or JTAG interface supplier may provide binaries for @@ -164,8 +157,7 @@ Users of these binary versions of OpenOCD must contact their Packager to ask for support or newer versions of the binaries; the OpenOCD developers do not support packages directly. -A Note to OpenOCD Packagers ---------------------------- +## A Note to OpenOCD Packagers You are a PACKAGER of OpenOCD if you: @@ -192,11 +184,9 @@ suggestions: - Use "ftdi" interface adapter driver for the FTDI-based devices. -================ -Building OpenOCD -================ +# Building OpenOCD -The INSTALL file contains generic instructions for running 'configure' +The INSTALL file contains generic instructions for running `configure` and compiling the OpenOCD source code. That file is provided by default for all GNU autotools packages. If you are not familiar with the GNU autotools, then you should read those instructions first. @@ -204,8 +194,7 @@ the GNU autotools, then you should read those instructions first. The remainder of this document tries to provide some instructions for those looking for a quick-install. -OpenOCD Dependencies --------------------- +## OpenOCD Dependencies GCC or Clang is currently required to build OpenOCD. The developers have begun to enforce strict code warnings (-Wall, -Werror, -Wextra, @@ -250,8 +239,7 @@ Optional development script checkpatch needs: - python - python-ply -Permissions delegation ----------------------- +## Permissions delegation Running OpenOCD with root/administrative permissions is strongly discouraged for security reasons. @@ -268,89 +256,81 @@ For parport adapters on Windows you need to run install_giveio.bat (it's also possible to use "ioperm" with Cygwin instead) to give ordinary users permissions for accessing the "LPT" registers directly. -Compiling OpenOCD ------------------ +## Compiling OpenOCD To build OpenOCD, use the following sequence of commands: - ./bootstrap (when building from the git repository) - ./configure [options] - make - sudo make install + ./bootstrap + ./configure [options] + make + sudo make install -The 'configure' step generates the Makefiles required to build +The `bootstrap` command is only necessary when building from the Git repository. The `configure` step generates the Makefiles required to build OpenOCD, usually with one or more options provided to it. The first 'make' step will build OpenOCD and place the final executable in -'./src/'. The final (optional) step, ``make install'', places all of +'./src/'. The final (optional) step, `make install`, places all of the files in the required location. -To see the list of all the supported options, run - ./configure --help +To see the list of all the supported options, run `./configure --help` -Cross-compiling Options ------------------------ +## Cross-compiling Options Cross-compiling is supported the standard autotools way, you just need to specify the cross-compiling target triplet in the --host option, e.g. for cross-building for Windows 32-bit with MinGW on Debian: - ./configure --host=i686-w64-mingw32 [options] + ./configure --host=i686-w64-mingw32 [options] To make pkg-config work nicely for cross-compiling, you might need an additional wrapper script as described at - https://autotools.io/pkgconfig/cross-compiling.html + https://autotools.io/pkgconfig/cross-compiling.html This is needed to tell pkg-config where to look for the target libraries that OpenOCD depends on. Alternatively, you can specify -*_CFLAGS and *_LIBS environment variables directly, see "./configure ---help" for the details. +`*_CFLAGS` and `*_LIBS` environment variables directly, see `./configure +--help` for the details. For a more or less complete script that does all this for you, see - contrib/cross-build.sh + contrib/cross-build.sh -Parallel Port Dongles ---------------------- +## Parallel Port Dongles If you want to access the parallel port using the PPDEV interface you -have to specify both --enable-parport AND --enable-parport-ppdev, since +have to specify both `--enable-parport` and `--enable-parport-ppdev`, since the later option is an option to the parport driver. -The same is true for the --enable-parport-giveio option, you have to -use both the --enable-parport AND the --enable-parport-giveio option +The same is true for the `--enable-parport-giveio` option, you have to +use both the `--enable-parport` and the `--enable-parport-giveio` option if you want to use giveio instead of ioperm parallel port access method. -========================== -Obtaining OpenOCD From GIT -========================== +# Obtaining OpenOCD From GIT You can download the current GIT version with a GIT client of your choice from the main repository: - git://git.code.sf.net/p/openocd/code + git://git.code.sf.net/p/openocd/code You may prefer to use a mirror: - http://repo.or.cz/r/openocd.git - git://repo.or.cz/openocd.git + http://repo.or.cz/r/openocd.git + git://repo.or.cz/openocd.git Using the GIT command line client, you might use the following command to set up a local copy of the current repository (make sure there is no directory called "openocd" in the current directory): - git clone git://git.code.sf.net/p/openocd/code openocd + git clone git://git.code.sf.net/p/openocd/code openocd -Then you can update that at your convenience using - - git pull +Then you can update that at your convenience using `git pull`. There is also a gitweb interface, which you can use either to browse the repository or to download arbitrary snapshots using HTTP: - http://repo.or.cz/w/openocd.git + http://repo.or.cz/w/openocd.git Snapshots are compressed tarballs of the source tree, about 1.3 MBytes each at this writing. From fd7b66c5eb038185b72953821204ec9bb8ce49d1 Mon Sep 17 00:00:00 2001 From: Jessica Clarke Date: Thu, 12 Sep 2024 20:12:05 +0100 Subject: [PATCH 42/43] binarybuffer: Fix inverted return value in buf_cmp This is the fast path for when there is a mismatch in the leading whole bytes, which means we should return true to indicate not equal like all the other cases here and in the surrounding functions. Otherwise we'll incorrectly report _buf1 == _buf2 if and only if there are mismatches in the leading whole bytes. This was introduced during the refactor and optimisation referenced below. The only in-tree caller of this is jtag_check_value_inner, which will just fail to catch some errors. However, downstream in riscv-openocd it gets used in the riscv target to determine whether an IR scan is needed to select the debug module, and with an IRLEN >= 8 this breaks resetting if the encoding for the DMI isn't all-ones in its leading whole bytes (to match BYPASS), since it will believe they are the same and not do an IR scan, failing (with "At least one TAP shouldn't be in BYPASS mode") in the subsequent DR scan due to the TAP still being recorded as having bypass set (and really having an instruction of either BYPASS or IDCODE). Fixes: e4ee891759b0 ("improve buf_cmp and buf_cmp_mask helpers") Change-Id: Ic4f7ed094429abc4c06a775eb847a8b3ddf2e2d6 Signed-off-by: Jessica Clarke Reviewed-on: https://review.openocd.org/c/openocd/+/8489 Reviewed-by: Antonio Borneo Reviewed-by: Evgeniy Naydanov Reviewed-by: Tomas Vanek Tested-by: jenkins --- src/helper/binarybuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 423739a9d..c25383dc6 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -74,7 +74,7 @@ bool buf_cmp(const void *_buf1, const void *_buf2, unsigned size) unsigned last = size / 8; if (memcmp(_buf1, _buf2, last) != 0) - return false; + return true; unsigned trailing = size % 8; if (!trailing) From 4c45762d76ce72df157a2b51993ccd8392104e82 Mon Sep 17 00:00:00 2001 From: Evgeniy Naydanov Date: Mon, 16 Sep 2024 18:01:17 +0300 Subject: [PATCH 43/43] target/breakpoints: fix types in `watchpoint_add_internal()` There was a conflict: 1. commit 2cd8ebf44d1a ("breakpoints: use 64-bit type for watchpoint mask and value") 2. commit 0bf3373e808a ("target/breakpoints: Use 'unsigned int' for length") The second commit was created erlier, but merged later so the types of `mask` and `value` became `uint32_t` in `watchpoint_add_internal()`. This created a bug: `WATCHPOINT_IGNORE_DATA_VALUE_MASK` is defined as `(~(uint64_t)0)`. Truncation to uint32_t makes it so the comparisons with the constant don't work. Change-Id: I19c414c351f52aff72a60330d83c29db7bbca375 Signed-off-by: Evgeniy Naydanov --- src/target/breakpoints.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c index a1ef3bf71..0427ba364 100644 --- a/src/target/breakpoints.c +++ b/src/target/breakpoints.c @@ -542,7 +542,7 @@ struct breakpoint *breakpoint_find(struct target *target, target_addr_t address) } static int watchpoint_add_internal(struct target *target, target_addr_t address, - unsigned int length, enum watchpoint_rw rw, uint32_t value, uint32_t mask) + unsigned int length, enum watchpoint_rw rw, uint64_t value, uint64_t mask) { struct watchpoint *watchpoint = target->watchpoints; struct watchpoint **watchpoint_p = &target->watchpoints;