diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c
index 01252bbf6..97111f2cc 100644
--- a/src/flash/pic32mx.c
+++ b/src/flash/pic32mx.c
@@ -543,7 +543,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
 {
 	target_t *target = bank->target;
 	struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	int i;
 	uint16_t num_pages = 0;
@@ -640,7 +640,7 @@ COMMAND_HANDLER(pic32mx_handle_part_id_command)
 static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
 {
 	target_t *target = bank->target;
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	uint32_t device_id;
 	int printed = 0, i;
diff --git a/src/target/mips32.c b/src/target/mips32.c
index c8e47aac1..6cec7f01a 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -100,7 +100,7 @@ int mips32_get_core_reg(reg_t *reg)
 	int retval;
 	mips32_core_reg_t *mips32_reg = reg->arch_info;
 	target_t *target = mips32_reg->target;
-	mips32_common_t *mips32_target = target->arch_info;
+	struct mips32_common *mips32_target = target->arch_info;
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -136,7 +136,7 @@ int mips32_read_core_reg(struct target_s *target, int num)
 	mips32_core_reg_t *mips_core_reg;
 
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if ((num < 0) || (num >= MIPS32NUMCOREREGS))
 		return ERROR_INVALID_ARGUMENTS;
@@ -156,7 +156,7 @@ int mips32_write_core_reg(struct target_s *target, int num)
 	mips32_core_reg_t *mips_core_reg;
 
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if ((num < 0) || (num >= MIPS32NUMCOREREGS))
 		return ERROR_INVALID_ARGUMENTS;
@@ -174,7 +174,7 @@ int mips32_write_core_reg(struct target_s *target, int num)
 int mips32_invalidate_core_regs(target_t *target)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	int i;
 
 	for (i = 0; i < mips32->core_cache->num_regs; i++)
@@ -189,7 +189,7 @@ int mips32_invalidate_core_regs(target_t *target)
 int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	int i;
 
 	/* include floating point registers */
@@ -215,7 +215,7 @@ int mips32_save_context(target_t *target)
 	int i;
 
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	/* read core registers */
@@ -237,7 +237,7 @@ int mips32_restore_context(target_t *target)
 	int i;
 
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	for (i = 0; i < MIPS32NUMCOREREGS; i++)
@@ -256,7 +256,7 @@ int mips32_restore_context(target_t *target)
 
 int mips32_arch_state(struct target_s *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (mips32->common_magic != MIPS32_COMMON_MAGIC)
 	{
@@ -274,7 +274,7 @@ int mips32_arch_state(struct target_s *target)
 reg_cache_t *mips32_build_reg_cache(target_t *target)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	int num_regs = MIPS32NUMCOREREGS;
 	reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
@@ -315,7 +315,7 @@ reg_cache_t *mips32_build_reg_cache(target_t *target)
 	return cache;
 }
 
-int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, struct jtag_tap *tap)
+int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct jtag_tap *tap)
 {
 	target->arch_info = mips32;
 	mips32->common_magic = MIPS32_COMMON_MAGIC;
@@ -344,7 +344,7 @@ int mips32_run_algorithm(struct target_s *target, int num_mem_params, struct mem
 
 int mips32_examine(struct target_s *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (!target_was_examined(target))
 	{
@@ -364,7 +364,7 @@ int mips32_examine(struct target_s *target)
 int mips32_configure_break_unit(struct target_s *target)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	int retval;
 	uint32_t dcr, bpinfo;
 	int i;
diff --git a/src/target/mips32.h b/src/target/mips32.h
index 5398ddf7f..870ff487d 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -45,7 +45,7 @@ struct mips32_comparator
 	uint32_t reg_address;
 };
 
-typedef struct mips32_common_s
+struct mips32_common
 {
 	uint32_t common_magic;
 	void *arch_info;
@@ -64,13 +64,13 @@ typedef struct mips32_common_s
 	/* register cache to processor synchronization */
 	int (*read_core_reg)(struct target_s *target, int num);
 	int (*write_core_reg)(struct target_s *target, int num);
-} mips32_common_t;
+};
 
 typedef struct mips32_core_reg_s
 {
 	uint32_t num;
 	struct target_s *target;
-	mips32_common_t *mips32_common;
+	struct mips32_common *mips32_common;
 } mips32_core_reg_t;
 
 #define MIPS32_OP_BEQ	0x04
@@ -127,7 +127,7 @@ typedef struct mips32_core_reg_s
 int mips32_arch_state(struct target_s *target);
 
 int mips32_init_arch_info(target_t *target,
-		mips32_common_t *mips32, struct jtag_tap *tap);
+		struct mips32_common *mips32, struct jtag_tap *tap);
 
 int mips32_restore_context(target_t *target);
 int mips32_save_context(target_t *target);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index df9ec4143..fa40574e5 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -122,7 +122,7 @@ int mips_m4k_examine_debug_reason(target_t *target)
 
 int mips_m4k_debug_entry(target_t *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	uint32_t debug_reg;
 
@@ -154,7 +154,7 @@ int mips_m4k_debug_entry(target_t *target)
 int mips_m4k_poll(target_t *target)
 {
 	int retval;
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
@@ -214,7 +214,7 @@ int mips_m4k_poll(target_t *target)
 
 int mips_m4k_halt(struct target_s *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("target->state: %s",
@@ -259,7 +259,7 @@ int mips_m4k_halt(struct target_s *target)
 
 int mips_m4k_assert_reset(target_t *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("target->state: %s",
@@ -338,7 +338,7 @@ int mips_m4k_soft_reset_halt(struct target_s *target)
 
 int mips_m4k_single_step_core(target_t *target)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	/* configure single step mode */
@@ -357,7 +357,7 @@ int mips_m4k_single_step_core(target_t *target)
 
 int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	breakpoint_t *breakpoint = NULL;
 	uint32_t resume_pc;
@@ -429,7 +429,7 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int
 int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	breakpoint_t *breakpoint = NULL;
 
@@ -493,7 +493,7 @@ void mips_m4k_enable_breakpoints(struct target_s *target)
 
 int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->inst_break_list;
 	int retval;
 
@@ -585,7 +585,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->inst_break_list;
 	int retval;
 
@@ -659,7 +659,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 
 int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (breakpoint->type == BKPT_HARD)
 	{
@@ -680,7 +680,7 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -701,7 +701,7 @@ int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint
 
 int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->data_break_list;
 	int wp_num = 0;
 	/*
@@ -770,7 +770,7 @@ int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoi
 int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->data_break_list;
 
 	if (!watchpoint->set)
@@ -795,7 +795,7 @@ int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchp
 
 int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (mips32->num_data_bpoints_avail < 1)
 	{
@@ -812,7 +812,7 @@ int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoi
 int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
 	/* get pointers to arch-specific information */
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -845,7 +845,7 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
 
 int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
@@ -877,7 +877,7 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 
 int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
@@ -919,7 +919,7 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
 
 int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struct jtag_tap *tap)
 {
-	mips32_common_t *mips32 = &mips_m4k->mips32_common;
+	struct mips32_common *mips32 = &mips_m4k->mips32_common;
 
 	mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC;
 
@@ -942,7 +942,7 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
 int mips_m4k_examine(struct target_s *target)
 {
 	int retval;
-	mips32_common_t *mips32 = target->arch_info;
+	struct mips32_common *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	uint32_t idcode = 0;
 
diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h
index 3eddc3f77..89c0a1626 100644
--- a/src/target/mips_m4k.h
+++ b/src/target/mips_m4k.h
@@ -32,7 +32,7 @@ struct target_s;
 typedef struct mips_m4k_common_s
 {
 	int common_magic;
-	mips32_common_t mips32_common;
+	struct mips32_common mips32_common;
 } mips_m4k_common_t;
 
 int mips_m4k_bulk_write_memory(struct target_s *target,