interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

michal smulski <michal.smulski@ooma.com>: 

Fix ARM11 half-word bulk memory read and write.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2572 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch 2009-08-06 19:52:56 +00:00
parent 9b29b729f3
commit 398f60af56
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/target/arm11.c
View File

@ -1149,7 +1149,7 @@ int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size,
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1); arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
uint16_t svalue = res; uint16_t svalue = res;
memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t)); memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
} }
break; break;
@ -1219,7 +1219,7 @@ int arm11_write_memory(struct target_s *target, uint32_t address, uint32_t size,
for (size_t i = 0; i < count; i++) for (size_t i = 0; i < count; i++)
{ {
uint16_t value; uint16_t value;
memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t)); memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
/* MRC p14,0,r1,c0,c5,0 */ /* MRC p14,0,r1,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xee101e15, value); arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);