- added svn prop eol-style native

- fixed mixed line endings on crt.s

git-svn-id: svn://svn.berlios.de/openocd/trunk@407 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-03-01 12:49:20 +00:00
parent 5653e6c77c
commit 387435a368
10 changed files with 1167 additions and 1168 deletions

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/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* History: * History:
* *
* 30.03.06 mifi First Version for Insight tutorial * 30.03.06 mifi First Version for Insight tutorial
****************************************************************************/ ****************************************************************************/
#ifndef __TYPEDEFS_H__ #ifndef __TYPEDEFS_H__
#define __TYPEDEFS_H__ #define __TYPEDEFS_H__
/* /*
* Some types to use Windows like source * Some types to use Windows like source
*/ */
typedef char CHAR; /* 8-bit signed data */ typedef char CHAR; /* 8-bit signed data */
typedef unsigned char BYTE; /* 8-bit unsigned data */ typedef unsigned char BYTE; /* 8-bit unsigned data */
typedef unsigned short WORD; /* 16-bit unsigned data */ typedef unsigned short WORD; /* 16-bit unsigned data */
typedef long LONG; /* 32-bit signed data */ typedef long LONG; /* 32-bit signed data */
typedef unsigned long ULONG; /* 32-bit unsigned data */ typedef unsigned long ULONG; /* 32-bit unsigned data */
typedef unsigned long DWORD; /* 32-bit unsigned data */ typedef unsigned long DWORD; /* 32-bit unsigned data */
#endif /* !__TYPEDEFS_H__ */ #endif /* !__TYPEDEFS_H__ */
/*** EOF ***/ /*** EOF ***/

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# #
# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!! # !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
# #
############################################################################################## ##############################################################################################
# #
# On command line: # On command line:
# #
# make all = Create project # make all = Create project
# #
# make clean = Clean project files. # make clean = Clean project files.
# #
# To rebuild project do "make clean" and "make all". # To rebuild project do "make clean" and "make all".
# #
############################################################################################## ##############################################################################################
# Start of default section # Start of default section
# #
TRGT = arm-elf- TRGT = arm-elf-
CC = $(TRGT)gcc CC = $(TRGT)gcc
CP = $(TRGT)objcopy CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp AS = $(TRGT)gcc -x assembler-with-cpp
BIN = $(CP) -O ihex BIN = $(CP) -O ihex
MCU = arm7tdmi MCU = arm7tdmi
# List all default C defines here, like -D_DEBUG=1 # List all default C defines here, like -D_DEBUG=1
DDEFS = DDEFS =
# List all default ASM defines here, like -D_DEBUG=1 # List all default ASM defines here, like -D_DEBUG=1
DADEFS = DADEFS =
# List all default directories to look for include files here # List all default directories to look for include files here
DINCDIR = DINCDIR =
# List the default directory to look for the libraries here # List the default directory to look for the libraries here
DLIBDIR = DLIBDIR =
# List all default libraries here # List all default libraries here
DLIBS = DLIBS =
# #
# End of default section # End of default section
############################################################################################## ##############################################################################################
############################################################################################## ##############################################################################################
# Start of user section # Start of user section
# #
# Define project name here # Define project name here
PROJECT = test PROJECT = test
# Define linker script file here # Define linker script file here
LDSCRIPT_RAM = ./prj/hitex_str7_ram.ld LDSCRIPT_RAM = ./prj/hitex_str7_ram.ld
LDSCRIPT_ROM = ./prj/hitex_str7_rom.ld LDSCRIPT_ROM = ./prj/hitex_str7_rom.ld
# List all user C define here, like -D_DEBUG=1 # List all user C define here, like -D_DEBUG=1
UDEFS = UDEFS =
# Define ASM defines here # Define ASM defines here
UADEFS = UADEFS =
# List C source files here # List C source files here
SRC = ./src/main.c SRC = ./src/main.c
# List ASM source files here # List ASM source files here
ASRC = ./src/crt.s ASRC = ./src/crt.s
# List all user directories here # List all user directories here
UINCDIR = ./inc UINCDIR = ./inc
# List the user directory to look for the libraries here # List the user directory to look for the libraries here
ULIBDIR = ULIBDIR =
# List all user libraries here # List all user libraries here
ULIBS = ULIBS =
# Define optimisation level here # Define optimisation level here
OPT = -O0 OPT = -O0
# #
# End of user defines # End of user defines
############################################################################################## ##############################################################################################
INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR)) INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
DEFS = $(DDEFS) $(UDEFS) DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS) ADEFS = $(DADEFS) $(UADEFS)
OBJS = $(ASRC:.s=.o) $(SRC:.c=.o) OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
LIBS = $(DLIBS) $(ULIBS) LIBS = $(DLIBS) $(ULIBS)
MCFLAGS = -mcpu=$(MCU) MCFLAGS = -mcpu=$(MCU)
ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS) ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS) CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR) LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR) LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
# Generate dependency information # Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d CPFLAGS += -MD -MP -MF .dep/$(@F).d
# #
# makefile rules # makefile rules
# #
all: RAM ROM all: RAM ROM
RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
%o : %c %o : %c
$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@ $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
%o : %s %o : %s
$(AS) -c $(ASFLAGS) $< -o $@ $(AS) -c $(ASFLAGS) $< -o $@
%ram.elf: $(OBJS) %ram.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@ $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
%rom.elf: $(OBJS) %rom.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@ $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
%hex: %elf %hex: %elf
$(BIN) $< $@ $(BIN) $< $@
clean: clean:
-rm -f $(OBJS) -rm -f $(OBJS)
-rm -f $(PROJECT)_ram.elf -rm -f $(PROJECT)_ram.elf
-rm -f $(PROJECT)_ram.map -rm -f $(PROJECT)_ram.map
-rm -f $(PROJECT)_ram.hex -rm -f $(PROJECT)_ram.hex
-rm -f $(PROJECT)_rom.elf -rm -f $(PROJECT)_rom.elf
-rm -f $(PROJECT)_rom.map -rm -f $(PROJECT)_rom.map
-rm -f $(PROJECT)_rom.hex -rm -f $(PROJECT)_rom.hex
-rm -f $(SRC:.c=.c.bak) -rm -f $(SRC:.c=.c.bak)
-rm -f $(SRC:.c=.lst) -rm -f $(SRC:.c=.lst)
-rm -f $(ASRC:.s=.s.bak) -rm -f $(ASRC:.s=.s.bak)
-rm -f $(ASRC:.s=.lst) -rm -f $(ASRC:.s=.lst)
-rm -fR .dep -rm -fR .dep
# #
# Include the dependency files, should be the last of the makefile # Include the dependency files, should be the last of the makefile
# #
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) -include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF *** # *** EOF ***

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target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable monitor arm7_9 sw_bkpts enable
monitor mww 0xA0000050 0x01c2 monitor mww 0xA0000050 0x01c2
monitor mdw 0xA0000050 monitor mdw 0xA0000050
load load
break main break main
continue continue

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target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable monitor arm7_9 force_hw_bkpts enable
monitor mww 0xA0000050 0x01c2 monitor mww 0xA0000050 0x01c2
monitor mdw 0xA0000050 monitor mdw 0xA0000050
load load
break main break main
continue continue

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/*********************************************************************************** /***********************************************************************************
* Copyright 2005 Anglia Design * Copyright 2005 Anglia Design
* This demo code and associated components are provided as is and has no warranty, * This demo code and associated components are provided as is and has no warranty,
* implied or otherwise. You are free to use/modify any of the provided * implied or otherwise. You are free to use/modify any of the provided
* code at your own risk in your applications with the expressed limitation * code at your own risk in your applications with the expressed limitation
* of liability (see below) * of liability (see below)
* *
* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR * LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* *
* Author : Spencer Oliver * Author : Spencer Oliver
* Web : www.anglia-designs.com * Web : www.anglia-designs.com
* *
***********************************************************************************/ ***********************************************************************************/
/* Stack Sizes */ /* Stack Sizes */
_STACKSIZE = 1024; _STACKSIZE = 1024;
_STACKSIZE_IRQ = 256; _STACKSIZE_IRQ = 256;
_STACKSIZE_FIQ = 0; _STACKSIZE_FIQ = 0;
_STACKSIZE_SVC = 1024; _STACKSIZE_SVC = 1024;
_STACKSIZE_ABT = 0; _STACKSIZE_ABT = 0;
_STACKSIZE_UND = 0; _STACKSIZE_UND = 0;
_HEAPSIZE = 1024; _HEAPSIZE = 1024;
/* Memory Definitions */ /* Memory Definitions */
MEMORY MEMORY
{ {
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.debug_abbrev 0 : { *(.debug_abbrev) } .debug_abbrev 0 : { *(.debug_abbrev) }
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/* SGI/MIPS DWARF 2 extensions */ /* SGI/MIPS DWARF 2 extensions */
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} }

View File

@ -1,259 +1,259 @@
/*********************************************************************************** /***********************************************************************************
* Copyright 2005 Anglia Design * Copyright 2005 Anglia Design
* This demo code and associated components are provided as is and has no warranty, * This demo code and associated components are provided as is and has no warranty,
* implied or otherwise. You are free to use/modify any of the provided * implied or otherwise. You are free to use/modify any of the provided
* code at your own risk in your applications with the expressed limitation * code at your own risk in your applications with the expressed limitation
* of liability (see below) * of liability (see below)
* *
* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR * LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* *
* Author : Spencer Oliver * Author : Spencer Oliver
* Web : www.anglia-designs.com * Web : www.anglia-designs.com
* *
***********************************************************************************/ ***********************************************************************************/
/* Stack Sizes */ /* Stack Sizes */
_STACKSIZE = 1024; _STACKSIZE = 1024;
_STACKSIZE_IRQ = 256; _STACKSIZE_IRQ = 256;
_STACKSIZE_FIQ = 0; _STACKSIZE_FIQ = 0;
_STACKSIZE_SVC = 1024; _STACKSIZE_SVC = 1024;
_STACKSIZE_ABT = 0; _STACKSIZE_ABT = 0;
_STACKSIZE_UND = 0; _STACKSIZE_UND = 0;
_HEAPSIZE = 1024; _HEAPSIZE = 1024;
/* Memory Definitions */ /* Memory Definitions */
MEMORY MEMORY
{ {
CODE (rx) : ORIGIN = 0x40000000, LENGTH = 0x00040000 CODE (rx) : ORIGIN = 0x40000000, LENGTH = 0x00040000
DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000 DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000
} }
/* Section Definitions */ /* Section Definitions */
SECTIONS SECTIONS
{ {
/* first section is .text which is used for code */ /* first section is .text which is used for code */
.text : .text :
{ {
CREATE_OBJECT_SYMBOLS CREATE_OBJECT_SYMBOLS
KEEP(*(.vectrom)) KEEP(*(.vectrom))
KEEP(*(.init)) KEEP(*(.init))
*(.text .text.*) *(.text .text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
KEEP(*(.fini)) KEEP(*(.fini))
*(.gcc_except_table) *(.gcc_except_table)
} >CODE =0 } >CODE =0
. = ALIGN(4); . = ALIGN(4);
/* .ctors .dtors are used for c++ constructors/destructors */ /* .ctors .dtors are used for c++ constructors/destructors */
.ctors : .ctors :
{ {
PROVIDE(__ctors_start__ = .); PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*))) KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors)) KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .); PROVIDE(__ctors_end__ = .);
} >CODE } >CODE
.dtors : .dtors :
{ {
PROVIDE(__dtors_start__ = .); PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*))) KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors)) KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .); PROVIDE(__dtors_end__ = .);
} >CODE } >CODE
/* .rodata section which is used for read-only data (constants) */ /* .rodata section which is used for read-only data (constants) */
.rodata : .rodata :
{ {
*(.rodata .rodata.*) *(.rodata .rodata.*)
*(.gnu.linkonce.r.*) *(.gnu.linkonce.r.*)
} >CODE } >CODE
. = ALIGN(4); . = ALIGN(4);
.init_array : .init_array :
{ {
*(.init) *(.init)
*(.fini) *(.fini)
PROVIDE_HIDDEN (__preinit_array_start = .); PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array)) KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .); PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .); PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*))) KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array)) KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array)) KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*))) KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .); PROVIDE_HIDDEN (__fini_array_end = .);
} >CODE } >CODE
. = ALIGN(4); . = ALIGN(4);
/* .ARM.exidx is sorted, so has to go in its own output section. */ /* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .; __exidx_start = .;
.ARM.exidx : .ARM.exidx :
{ {
*(.ARM.exidx* .gnu.linkonce.armexidx.*) *(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >CODE } >CODE
__exidx_end = .; __exidx_end = .;
_vectext = .; _vectext = .;
PROVIDE (vectext = .); PROVIDE (vectext = .);
.vect : AT (_vectext) .vect : AT (_vectext)
{ {
_vecstart = .; _vecstart = .;
KEEP(*(.vectram)) KEEP(*(.vectram))
_vecend = .; _vecend = .;
} >DATA } >DATA
_etext = _vectext + SIZEOF(.vect); _etext = _vectext + SIZEOF(.vect);
PROVIDE (etext = .); PROVIDE (etext = .);
/* .data section which is used for initialized data */ /* .data section which is used for initialized data */
.data : AT (_etext) .data : AT (_etext)
{ {
__data_start = .; __data_start = .;
*(.data .data.*) *(.data .data.*)
*(.gnu.linkonce.d.*) *(.gnu.linkonce.d.*)
SORT(CONSTRUCTORS) SORT(CONSTRUCTORS)
. = ALIGN(4); . = ALIGN(4);
*(.fastrun .fastrun.*) *(.fastrun .fastrun.*)
} >DATA } >DATA
. = ALIGN(4); . = ALIGN(4);
_edata = .; _edata = .;
PROVIDE (edata = .); PROVIDE (edata = .);
/* .bss section which is used for uninitialized data */ /* .bss section which is used for uninitialized data */
.bss : .bss :
{ {
__bss_start = .; __bss_start = .;
__bss_start__ = .; __bss_start__ = .;
*(.bss .bss.*) *(.bss .bss.*)
*(.gnu.linkonce.b.*) *(.gnu.linkonce.b.*)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
} >DATA } >DATA
. = ALIGN(4); . = ALIGN(4);
__bss_end__ = .; __bss_end__ = .;
_end = .; _end = .;
PROVIDE(end = .); PROVIDE(end = .);
/* .heap section which is used for memory allocation */ /* .heap section which is used for memory allocation */
.heap (NOLOAD) : .heap (NOLOAD) :
{ {
__heap_start__ = .; __heap_start__ = .;
*(.heap) *(.heap)
. = MAX(__heap_start__ + _HEAPSIZE , .); . = MAX(__heap_start__ + _HEAPSIZE , .);
} >DATA } >DATA
__heap_end__ = __heap_start__ + SIZEOF(.heap); __heap_end__ = __heap_start__ + SIZEOF(.heap);
/* .stack section - user mode stack */ /* .stack section - user mode stack */
.stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) : .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_start__ = .; __stack_start__ = .;
*(.stack) *(.stack)
. = MAX(__stack_start__ + _STACKSIZE , .); . = MAX(__stack_start__ + _STACKSIZE , .);
} >DATA } >DATA
__stack_end__ = __stack_start__ + SIZEOF(.stack); __stack_end__ = __stack_start__ + SIZEOF(.stack);
/* .stack_irq section */ /* .stack_irq section */
.stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) : .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_irq_start__ = .; __stack_irq_start__ = .;
*(.stack_irq) *(.stack_irq)
. = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .); . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);
} >DATA } >DATA
__stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq); __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);
/* .stack_fiq section */ /* .stack_fiq section */
.stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) : .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_fiq_start__ = .; __stack_fiq_start__ = .;
*(.stack_fiq) *(.stack_fiq)
. = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .); . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);
} >DATA } >DATA
__stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq); __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);
/* .stack_svc section */ /* .stack_svc section */
.stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) : .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_svc_start__ = .; __stack_svc_start__ = .;
*(.stack_svc) *(.stack_svc)
. = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .); . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);
} >DATA } >DATA
__stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc); __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);
/* .stack_abt section */ /* .stack_abt section */
.stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) : .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_abt_start__ = .; __stack_abt_start__ = .;
*(.stack_abt) *(.stack_abt)
. = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .); . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);
} >DATA } >DATA
__stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt); __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);
/* .stack_und section */ /* .stack_und section */
.stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) : .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_und_start__ = .; __stack_und_start__ = .;
*(.stack_und) *(.stack_und)
. = MAX(__stack_und_start__ + _STACKSIZE_UND , .); . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);
} >DATA } >DATA
__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und); __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
/* Stabs debugging sections. */ /* Stabs debugging sections. */
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) } .stab.excl 0 : { *(.stab.excl) }
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/* DWARF debug sections. /* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */ of the section so we begin them at 0. */
/* DWARF 1 */ /* DWARF 1 */
.debug 0 : { *(.debug) } .debug 0 : { *(.debug) }
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/* GNU DWARF 1 extensions */ /* GNU DWARF 1 extensions */
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/* DWARF 1.1 and DWARF 2 */ /* DWARF 1.1 and DWARF 2 */
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/* DWARF 2 */ /* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) } .debug_abbrev 0 : { *(.debug_abbrev) }
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/* SGI/MIPS DWARF 2 extensions */ /* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) } .debug_weaknames 0 : { *(.debug_weaknames) }
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} }

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@ -1,40 +1,40 @@
#daemon configuration #daemon configuration
telnet_port 4444 telnet_port 4444
gdb_port 3333 gdb_port 3333
# tell gdb our flash memory map # tell gdb our flash memory map
# and enable flash programming # and enable flash programming
gdb_memory_map enable gdb_memory_map enable
gdb_flash_program enable gdb_flash_program enable
#interface #interface
interface ft2232 interface ft2232
ft2232_device_desc "Amontec JTAGkey A" ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8 ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0 jtag_speed 0
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst reset_config trst_and_srst srst_pulls_trst
#jtag scan chain #jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
#target configuration #target configuration
daemon_startup reset daemon_startup reset
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30 run_and_halt_time 0 30
target_script 0 gdb_program_config .\prj\str710_program.script target_script 0 gdb_program_config .\prj\str710_program.script
working_area 0 0x2000C000 0x4000 nobackup working_area 0 0x2000C000 0x4000 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant> #flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

View File

@ -1,8 +1,8 @@
flash protect 0 0 7 off flash protect 0 0 7 off

View File

@ -1,300 +1,299 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 04.03.06 mifi First Version * 04.03.06 mifi First Version
* This version based on an example from Ethernut and * This version based on an example from Ethernut and
* "ARM Cross Development with Eclipse" from James P. Lynch * "ARM Cross Development with Eclipse" from James P. Lynch
* *
* 26.01.08 mifi Change the code of the init section. Here I have used * 26.01.08 mifi Change the code of the init section. Here I have used
* some of the source from the Anglia startup.s * some of the source from the Anglia startup.s
* Author: Spencer Oliver (www.anglia-designs.com) * Author: Spencer Oliver (www.anglia-designs.com)
****************************************************************************/ ****************************************************************************/
/* /*
* Some defines for the program status registers * Some defines for the program status registers
*/ */
ARM_MODE_USER = 0x10 /* Normal User Mode */ ARM_MODE_USER = 0x10 /* Normal User Mode */
ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */ ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */ ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */ ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */ ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */ ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */ ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
ARM_MODE_MASK = 0x1F ARM_MODE_MASK = 0x1F
I_BIT = 0x80 /* disable IRQ when I bit is set */ I_BIT = 0x80 /* disable IRQ when I bit is set */
F_BIT = 0x40 /* disable IRQ when I bit is set */ F_BIT = 0x40 /* disable IRQ when I bit is set */
/* /*
* Register Base Address * Register Base Address
*/ */
PRCCU_BASE = 0xA0000000 PRCCU_BASE = 0xA0000000
RCCU_CFR = 0x08 RCCU_CFR = 0x08
RCCU_PLL1CR = 0x18 RCCU_PLL1CR = 0x18
PCU_MDIVR = 0x40 PCU_MDIVR = 0x40
PCU_PDIVR = 0x44 PCU_PDIVR = 0x44
PCU_BOOTCR = 0x50 PCU_BOOTCR = 0x50
.section .vectors,"ax" .section .vectors,"ax"
.code 32 .code 32
/****************************************************************************/ /****************************************************************************/
/* Vector table and reset entry */ /* Vector table and reset entry */
/****************************************************************************/ /****************************************************************************/
_vectors: _vectors:
ldr pc, ResetAddr /* Reset */ ldr pc, ResetAddr /* Reset */
ldr pc, UndefAddr /* Undefined instruction */ ldr pc, UndefAddr /* Undefined instruction */
ldr pc, SWIAddr /* Software interrupt */ ldr pc, SWIAddr /* Software interrupt */
ldr pc, PAbortAddr /* Prefetch abort */ ldr pc, PAbortAddr /* Prefetch abort */
ldr pc, DAbortAddr /* Data abort */ ldr pc, DAbortAddr /* Data abort */
ldr pc, ReservedAddr /* Reserved */ ldr pc, ReservedAddr /* Reserved */
ldr pc, IRQAddr /* IRQ interrupt */ ldr pc, IRQAddr /* IRQ interrupt */
ldr pc, FIQAddr /* FIQ interrupt */ ldr pc, FIQAddr /* FIQ interrupt */
ResetAddr: .word ResetHandler ResetAddr: .word ResetHandler
UndefAddr: .word UndefHandler UndefAddr: .word UndefHandler
SWIAddr: .word SWIHandler SWIAddr: .word SWIHandler
PAbortAddr: .word PAbortHandler PAbortAddr: .word PAbortHandler
DAbortAddr: .word DAbortHandler DAbortAddr: .word DAbortHandler
ReservedAddr: .word 0 ReservedAddr: .word 0
IRQAddr: .word IRQHandler IRQAddr: .word IRQHandler
FIQAddr: .word FIQHandler FIQAddr: .word FIQHandler
.ltorg .ltorg
.section .init, "ax" .section .init, "ax"
.code 32 .code 32
.global ResetHandler .global ResetHandler
.global ExitFunction .global ExitFunction
.extern main .extern main
/****************************************************************************/ /****************************************************************************/
/* Reset handler */ /* Reset handler */
/****************************************************************************/ /****************************************************************************/
ResetHandler: ResetHandler:
/* /*
* Wait for the oscillator is stable * Wait for the oscillator is stable
*/ */
nop nop
nop nop
nop nop
nop nop
nop nop
nop nop
nop nop
nop nop
/* /*
* Setup STR71X, for more information about the register * Setup STR71X, for more information about the register
* take a look in the STR71x Microcontroller Reference Manual. * take a look in the STR71x Microcontroller Reference Manual.
* *
* Reference is made to: Rev. 6 March 2005 * Reference is made to: Rev. 6 March 2005
* *
* 1. Map internal RAM to address 0 * 1. Map internal RAM to address 0
* In this case, we are running always in the RAM * In this case, we are running always in the RAM
* this make no sence. But if we are in flash, we * this make no sence. But if we are in flash, we
* can copy the interrupt vectors into the ram and * can copy the interrupt vectors into the ram and
* switch to RAM mode. * switch to RAM mode.
* *
* 2. Setup the PLL, the eval board HITEX STR7 is equipped * 2. Setup the PLL, the eval board HITEX STR7 is equipped
* with an external 16MHz oscillator. We want: * with an external 16MHz oscillator. We want:
* *
* RCLK: 32MHz = (CLK2 * 16) / 4 * RCLK: 32MHz = (CLK2 * 16) / 4
* MCLK: 32Mhz * MCLK: 32Mhz
* PCLK1: 32MHz * PCLK1: 32MHz
* PCLK2: 32MHz * PCLK2: 32MHz
* *
*/ */
/* /*
* 1. Map RAM to the boot memory 0x00000000 * 1. Map RAM to the boot memory 0x00000000
*/ */
ldr r0, =PRCCU_BASE ldr r0, =PRCCU_BASE
ldr r1, =0x01C2 ldr r1, =0x01C2
str r1, [r0, #PCU_BOOTCR] str r1, [r0, #PCU_BOOTCR]
/* /*
* 2. Setup PLL start * 2. Setup PLL start
*/ */
/* Set the prescaling factor for APB and APB1 group */ /* Set the prescaling factor for APB and APB1 group */
ldr r0, =PRCCU_BASE ldr r0, =PRCCU_BASE
ldr r1, =0x0000 /* no prescaling PCLKx = RCLK */ ldr r1, =0x0000 /* no prescaling PCLKx = RCLK */
str r1, [r0, #PCU_PDIVR] str r1, [r0, #PCU_PDIVR]
/* Set the prescaling factor for the Main System Clock MCLK */ /* Set the prescaling factor for the Main System Clock MCLK */
ldr r0, =PRCCU_BASE ldr r0, =PRCCU_BASE
ldr r1, =0x0000 /* no prescaling MCLK = RCLK ldr r1, =0x0000 /* no prescaling MCLK = RCLK
str r1, [r0, #PCU_MDIVR] str r1, [r0, #PCU_MDIVR]
/* Configure the PLL1 ( * 16 , / 4 ) */ /* Configure the PLL1 ( * 16 , / 4 ) */
ldr r0, =PRCCU_BASE ldr r0, =PRCCU_BASE
ldr r1, =0x0073 ldr r1, =0x0073
str r1, [r0, #RCCU_PLL1CR] str r1, [r0, #RCCU_PLL1CR]
/* Check if the PLL is locked */ /* Check if the PLL is locked */
pll_lock_loop: pll_lock_loop:
ldr r1, [r0, #RCCU_CFR] ldr r1, [r0, #RCCU_CFR]
tst r1, #0x0002 tst r1, #0x0002
beq pll_lock_loop beq pll_lock_loop
/* Select PLL1_Output as RCLK clock */ /* Select PLL1_Output as RCLK clock */
ldr r0, =PRCCU_BASE ldr r0, =PRCCU_BASE
ldr r1, =0x8009 ldr r1, =0x8009
str r1, [r0, #RCCU_CFR] str r1, [r0, #RCCU_CFR]
/* /*
* Setup PLL end * Setup PLL end
*/ */
/* /*
* Setup a stack for each mode * Setup a stack for each mode
*/ */
msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
ldr sp, =__stack_und_end__ ldr sp, =__stack_und_end__
msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */ msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
ldr sp, =__stack_abt_end__ ldr sp, =__stack_abt_end__
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
ldr sp, =__stack_fiq_end__ ldr sp, =__stack_fiq_end__
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
ldr sp, =__stack_irq_end__ ldr sp, =__stack_irq_end__
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
ldr sp, =__stack_svc_end__ ldr sp, =__stack_svc_end__
/* /*
* Now init all the sections * Now init all the sections
*/ */
/* /*
* Relocate .data section (Copy from ROM to RAM) * Relocate .data section (Copy from ROM to RAM)
*/ */
ldr r1, =_etext ldr r1, =_etext
ldr r2, =__data_start ldr r2, =__data_start
ldr r3, =_edata ldr r3, =_edata
LoopRel: LoopRel:
cmp r2, r3 cmp r2, r3
ldrlo r0, [r1], #4 ldrlo r0, [r1], #4
strlo r0, [r2], #4 strlo r0, [r2], #4
blo LoopRel blo LoopRel
/* /*
* Clear .bss section (Zero init) * Clear .bss section (Zero init)
*/ */
mov r0, #0 mov r0, #0
ldr r1, =__bss_start__ ldr r1, =__bss_start__
ldr r2, =__bss_end__ ldr r2, =__bss_end__
LoopZI: LoopZI:
cmp r1, r2 cmp r1, r2
strlo r0, [r1], #4 strlo r0, [r1], #4
blo LoopZI blo LoopZI
/* /*
* Call C++ constructors * Call C++ constructors
*/ */
ldr r0, =__ctors_start__ ldr r0, =__ctors_start__
ldr r1, =__ctors_end__ ldr r1, =__ctors_end__
ctor_loop: ctor_loop:
cmp r0, r1 cmp r0, r1
beq ctor_end beq ctor_end
ldr r2, [r0], #4 ldr r2, [r0], #4
stmfd sp!, {r0-r1} stmfd sp!, {r0-r1}
mov lr, pc mov lr, pc
mov pc, r2 mov pc, r2
ldmfd sp!, {r0-r1} ldmfd sp!, {r0-r1}
b ctor_loop b ctor_loop
ctor_end: ctor_end:
/* /*
* Jump to main * Jump to main
*/ */
mrs r0, cpsr mrs r0, cpsr
bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */ bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
msr cpsr, r0 msr cpsr, r0
mov r0, #0 /* No arguments */ mov r0, #0 /* No arguments */
mov r1, #0 /* No arguments */ mov r1, #0 /* No arguments */
ldr r2, =main ldr r2, =main
mov lr, pc mov lr, pc
bx r2 /* And jump... */ bx r2 /* And jump... */
ExitFunction: ExitFunction:
nop nop
nop nop
nop nop
b ExitFunction b ExitFunction
/****************************************************************************/ /****************************************************************************/
/* Default interrupt handler */ /* Default interrupt handler */
/****************************************************************************/ /****************************************************************************/
UndefHandler: UndefHandler:
b UndefHandler b UndefHandler
SWIHandler: SWIHandler:
b SWIHandler b SWIHandler
PAbortHandler: PAbortHandler:
b PAbortHandler b PAbortHandler
DAbortHandler: DAbortHandler:
b DAbortHandler b DAbortHandler
IRQHandler: IRQHandler:
b IRQHandler b IRQHandler
FIQHandler: FIQHandler:
b FIQHandler b FIQHandler
.weak ExitFunction .weak ExitFunction
.weak UndefHandler, PAbortHandler, DAbortHandler .weak UndefHandler, PAbortHandler, DAbortHandler
.weak IRQHandler, FIQHandler .weak IRQHandler, FIQHandler
.ltorg .ltorg
/*** EOF ***/ /*** EOF ***/

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@ -1,91 +1,91 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* History: * History:
* *
* 30.03.06 mifi First Version for Insight tutorial * 30.03.06 mifi First Version for Insight tutorial
* 26.01.08 mifi Added variable "d" to test const variable. * 26.01.08 mifi Added variable "d" to test const variable.
****************************************************************************/ ****************************************************************************/
#define __MAIN_C__ #define __MAIN_C__
/* /*
* I use the include only, to show * I use the include only, to show
* how to setup a include dir in the makefile * how to setup a include dir in the makefile
*/ */
#include "typedefs.h" #include "typedefs.h"
/*=========================================================================*/ /*=========================================================================*/
/* DEFINE: All Structures and Common Constants */ /* DEFINE: All Structures and Common Constants */
/*=========================================================================*/ /*=========================================================================*/
/*=========================================================================*/ /*=========================================================================*/
/* DEFINE: Prototypes */ /* DEFINE: Prototypes */
/*=========================================================================*/ /*=========================================================================*/
/*=========================================================================*/ /*=========================================================================*/
/* DEFINE: Definition of all local Data */ /* DEFINE: Definition of all local Data */
/*=========================================================================*/ /*=========================================================================*/
static const DWORD d = 7; static const DWORD d = 7;
/*=========================================================================*/ /*=========================================================================*/
/* DEFINE: Definition of all local Procedures */ /* DEFINE: Definition of all local Procedures */
/*=========================================================================*/ /*=========================================================================*/
/*=========================================================================*/ /*=========================================================================*/
/* DEFINE: All code exported */ /* DEFINE: All code exported */
/*=========================================================================*/ /*=========================================================================*/
/***************************************************************************/ /***************************************************************************/
/* main */ /* main */
/***************************************************************************/ /***************************************************************************/
int main (void) int main (void)
{ {
DWORD a = 1; DWORD a = 1;
DWORD b = 2; DWORD b = 2;
DWORD c = 0; DWORD c = 0;
a = a + d; a = a + d;
while (1) while (1)
{ {
a++; a++;
b++; b++;
c = a + b; c = a + b;
} }
/* /*
* This return here make no sense. * This return here make no sense.
* But to prevent the compiler warning: * But to prevent the compiler warning:
* "return type of 'main' is not 'int' * "return type of 'main' is not 'int'
* we use an int as return :-) * we use an int as return :-)
*/ */
return(0); return(0);
} }
/*** EOF ***/ /*** EOF ***/