Kinetis: Add K24 support and tidy up
The K24 uses the KL-style SDID register and has some flashing quirks, so the kinetis driver does not support it properly. Extend the chip detection routine to support the new SDID format. Add a parameter for the maximum flash size, as the K24 only supports 1k flashing blocks but has 4k sector size. Remove global 'granularity' array, as it's only really needed in one function. Replace 'klxx' with an enum showing which flash commands are actually supported on a given chip. Signed-off-by: Patrick Stewart <patstew@gmail.com> Change-Id: Ie244fab564d58c5cfe4fa36a025f0b2674ffad69 Reviewed-on: http://openocd.zylin.com/2864 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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@ -52,53 +52,30 @@
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* variants also have FlexNVM and FlexRAM, which always appear
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* together.
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*
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* A given Kinetis chip may have 2 or 4 blocks of flash. Here we map
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* A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
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* each block to a separate bank. Each block size varies by chip and
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* may be determined by the read-only SIM_FCFG1 register. The sector
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* size within each bank/block varies by the chip granularity as
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* described below.
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* size within each bank/block varies by chip, and may be 1, 2 or 4k.
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* The sector size may be different for flash and FlexNVM.
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*
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* Kinetis offers four different of flash granularities applicable
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* across the chip families. The granularity is apparently reflected
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* by at least the reference manual suffix. For example, for chip
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* MK60FN1M0VLQ12, reference manual K60P144M150SF3RM ends in "SF3RM",
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* where the "3" indicates there are four flash blocks with 4kiB
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* sectors. All possible granularities are indicated below.
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*
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* The first half of the flash (1 or 2 blocks, depending on the
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* granularity) is always Program Flash and always starts at address
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* 0x00000000. The "PFLSH" flag, bit 23 of the read-only SIM_FCFG2
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* register, determines whether the second half of the flash is also
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* Program Flash or FlexNVM+FlexRAM. When PFLSH is set, the second
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* half of flash is Program Flash and is contiguous in the memory map
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* from the first half. When PFLSH is clear, the second half of flash
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* is FlexNVM and always starts at address 0x10000000. FlexRAM, which
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* is also present when PFLSH is clear, always starts at address
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* 0x14000000.
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* The first half of the flash (1 or 2 blocks) is always Program Flash
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* and always starts at address 0x00000000. The "PFLSH" flag, bit 23
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* of the read-only SIM_FCFG2 register, determines whether the second
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* half of the flash is also Program Flash or FlexNVM+FlexRAM. When
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* PFLSH is set, the second from the first half. When PFLSH is clear,
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* the second half of flash is FlexNVM and always starts at address
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* 0x10000000. FlexRAM, which is also present when PFLSH is clear,
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* always starts at address 0x14000000.
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*
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* The Flash Memory Module provides a register set where flash
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* commands are loaded to perform flash operations like erase and
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* program. Different commands are available depending on whether
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* Program Flash or FlexNVM/FlexRAM is being manipulated. Although
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* the commands used are quite consistent between flash blocks, the
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* parameters they accept differ according to the flash granularity.
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* Some Kinetis chips have different granularity between Program Flash
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* and FlexNVM/FlexRAM, so flash command arguments may differ between
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* blocks in the same chip.
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* parameters they accept differ according to the flash sector size.
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*
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*/
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static const struct {
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unsigned pflash_sector_size_bytes;
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unsigned nvm_sector_size_bytes;
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unsigned num_blocks;
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} kinetis_flash_params[4] = {
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{ 1<<10, 1<<10, 2 },
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{ 2<<10, 1<<10, 2 },
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{ 2<<10, 2<<10, 2 },
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{ 4<<10, 4<<10, 4 }
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};
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/* Addressess */
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#define FLEXRAM 0x14000000
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#define FTFx_FSTAT 0x40020000
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@ -106,6 +83,7 @@ static const struct {
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#define FTFx_FCCOB3 0x40020004
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#define FTFx_FPROT3 0x40020010
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#define SIM_SDID 0x40048024
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#define SIM_SOPT1 0x40047000
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#define SIM_FCFG1 0x4004804c
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#define SIM_FCFG2 0x40048050
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@ -118,14 +96,14 @@ static const struct {
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#define FTFx_CMD_SETFLEXRAM 0x81
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#define FTFx_CMD_MASSERASE 0x44
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/* The Kinetis K series uses the following SDID layout :
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/* The older Kinetis K series uses the following SDID layout :
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* Bit 31-16 : 0
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* Bit 15-12 : REVID
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* Bit 11-7 : DIEID
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* Bit 6-4 : FAMID
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* Bit 3-0 : PINID
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*
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* The Kinetis KL series uses the following SDID layout :
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* The newer Kinetis series uses the following SDID layout :
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* Bit 31-28 : FAMID
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* Bit 27-24 : SUBFAMID
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* Bit 23-20 : SERIESID
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@ -134,16 +112,20 @@ static const struct {
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* Bit 6-4 : Reserved (0)
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* Bit 3-0 : PINID
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*
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* SERIESID should be 1 for the KL-series so we assume that if
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* bits 31-16 are 0 then it's a K-series MCU.
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* We assume that if bits 31-16 are 0 then it's an older
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* K-series MCU.
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*/
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#define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
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#define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
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#define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
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#define KINETIS_SDID_DIEID_MASK 0x00000F80
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#define KINETIS_SDID_DIEID_K_A 0x00000100
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#define KINETIS_SDID_DIEID_K_B 0x00000200
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#define KINETIS_SDID_DIEID_KL 0x00000000
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#define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
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/* We can't rely solely on the FAMID field to determine the MCU
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* type since some FAMID values identify multiple MCUs with
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@ -176,15 +158,35 @@ static const struct {
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#define KINETIS_K_SDID_K60_M150 0x000001C0
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#define KINETIS_K_SDID_K70_M150 0x000001D0
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#define KINETIS_KL_SDID_SERIESID_MASK 0x00F00000
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#define KINETIS_KL_SDID_SERIESID_KL 0x00100000
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#define KINETIS_SDID_SERIESID_MASK 0x00F00000
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#define KINETIS_SDID_SERIESID_K 0x00000000
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#define KINETIS_SDID_SERIESID_KL 0x00100000
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#define KINETIS_SDID_SERIESID_KW 0x00500000
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#define KINETIS_SDID_SERIESID_KV 0x00600000
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#define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
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#define KINETIS_SDID_SUBFAMID_KX0 0x00000000
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#define KINETIS_SDID_SUBFAMID_KX1 0x01000000
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#define KINETIS_SDID_SUBFAMID_KX2 0x02000000
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#define KINETIS_SDID_SUBFAMID_KX3 0x03000000
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#define KINETIS_SDID_SUBFAMID_KX4 0x04000000
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#define KINETIS_SDID_SUBFAMID_KX5 0x05000000
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#define KINETIS_SDID_SUBFAMID_KX6 0x06000000
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#define KINETIS_SDID_FAMILYID_MASK 0xF0000000
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#define KINETIS_SDID_FAMILYID_K0X 0x00000000
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#define KINETIS_SDID_FAMILYID_K1X 0x10000000
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#define KINETIS_SDID_FAMILYID_K2X 0x20000000
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#define KINETIS_SDID_FAMILYID_K3X 0x30000000
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#define KINETIS_SDID_FAMILYID_K4X 0x40000000
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#define KINETIS_SDID_FAMILYID_K6X 0x60000000
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#define KINETIS_SDID_FAMILYID_K7X 0x70000000
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struct kinetis_flash_bank {
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unsigned granularity;
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unsigned bank_ordinal;
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uint32_t sector_size;
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uint32_t max_flash_prog_size;
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uint32_t protection_size;
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uint32_t klxx;
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uint32_t sim_sdid;
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uint32_t sim_fcfg1;
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@ -196,10 +198,14 @@ struct kinetis_flash_bank {
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FC_FLEX_NVM,
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FC_FLEX_RAM,
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} flash_class;
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enum {
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FS_PROGRAM_SECTOR = 1,
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FS_PROGRAM_LONGWORD = 2,
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FS_PROGRAM_PHRASE = 4, /* Unsupported */
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} flash_support;
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};
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#define MDM_REG_STAT 0x00
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#define MDM_REG_CTRL 0x04
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#define MDM_REG_ID 0xfc
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@ -872,10 +878,10 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
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return ERROR_TARGET_NOT_HALTED;
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}
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if (kinfo->klxx) {
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if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
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/* fallback to longword write */
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fallback = 1;
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LOG_WARNING("Kinetis L Series supports Program Longword execution only.");
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LOG_WARNING("This device supports Program Longword execution only.");
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LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
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} else if (kinfo->flash_class == FC_FLEX_NVM) {
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@ -915,9 +921,7 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
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* Kinetis "chunk" is 16 bytes (128 bits).
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*/
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unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
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/* assume the NVM sector size is half the FlexRAM size */
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unsigned prog_size_bytes = MIN(kinfo->sector_size,
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kinetis_flash_params[kinfo->granularity].nvm_sector_size_bytes);
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unsigned prog_size_bytes = kinfo->max_flash_prog_size;
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for (i = 0; i < count; i += prog_size_bytes) {
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uint8_t residual_buffer[16];
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uint8_t ftfx_fstat;
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}
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}
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/* program longword command, not supported in "SF3" devices */
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else if ((kinfo->granularity != 3) || (kinfo->klxx)) {
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else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
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if (count & 0x3) {
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uint32_t old_count = count;
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count = (old_count | 3) + 1;
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@ -1034,7 +1037,6 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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} else {
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LOG_ERROR("Flash write strategy not implemented");
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return ERROR_FLASH_OPERATION_FAILED;
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@ -1049,8 +1051,8 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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uint32_t offset = 0;
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uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
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uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
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unsigned granularity, num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0,
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first_nvm_bank = 0, reassign = 0;
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unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
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reassign = 0, pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
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struct target *target = bank->target;
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struct kinetis_flash_bank *kinfo = bank->driver_priv;
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if (result != ERROR_OK)
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return result;
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kinfo->klxx = 0;
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/* K-series MCU? */
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if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
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/* older K-series MCU */
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uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
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switch (mcu_type) {
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case KINETIS_K_SDID_K10_M50:
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case KINETIS_K_SDID_K20_M50:
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/* 1kB sectors */
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granularity = 0;
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pflash_sector_size_bytes = 1<<10;
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nvm_sector_size_bytes = 1<<10;
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num_blocks = 2;
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kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
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kinfo->max_flash_prog_size = 1<<10;
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break;
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case KINETIS_K_SDID_K10_M72:
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case KINETIS_K_SDID_K20_M72:
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case KINETIS_K_SDID_K40_M100:
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case KINETIS_K_SDID_K50_M72:
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/* 2kB sectors, 1kB FlexNVM sectors */
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granularity = 1;
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pflash_sector_size_bytes = 2<<10;
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nvm_sector_size_bytes = 1<<10;
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num_blocks = 2;
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kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
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kinfo->max_flash_prog_size = 1<<10;
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break;
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case KINETIS_K_SDID_K10_M100:
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case KINETIS_K_SDID_K20_M100:
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@ -1090,7 +1098,11 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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case KINETIS_K_SDID_K53:
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case KINETIS_K_SDID_K60_M100:
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/* 2kB sectors */
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granularity = 2;
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pflash_sector_size_bytes = 2<<10;
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nvm_sector_size_bytes = 2<<10;
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num_blocks = 2;
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kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
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kinfo->max_flash_prog_size = 2<<10;
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break;
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case KINETIS_K_SDID_K10_M120:
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case KINETIS_K_SDID_K20_M120:
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@ -1099,18 +1111,66 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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case KINETIS_K_SDID_K60_M150:
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case KINETIS_K_SDID_K70_M150:
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/* 4kB sectors */
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granularity = 3;
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pflash_sector_size_bytes = 4<<10;
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nvm_sector_size_bytes = 4<<10;
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num_blocks = 4;
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kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
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kinfo->max_flash_prog_size = 4<<10;
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break;
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default:
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LOG_ERROR("Unsupported K-family FAMID");
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return ERROR_FLASH_OPER_UNSUPPORTED;
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}
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}
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/* KL-series? */
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else if ((kinfo->sim_sdid & KINETIS_KL_SDID_SERIESID_MASK) == KINETIS_KL_SDID_SERIESID_KL) {
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kinfo->klxx = 1;
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granularity = 0;
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} else {
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/* Newer K-series or KL series MCU */
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switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
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case KINETIS_SDID_SERIESID_K:
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switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
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case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
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/* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
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uint32_t sopt1;
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result = target_read_u32(target, SIM_SOPT1, &sopt1);
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if (result != ERROR_OK)
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return result;
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if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
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((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
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/* MK24FN1M */
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pflash_sector_size_bytes = 4<<10;
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num_blocks = 2;
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kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
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kinfo->max_flash_prog_size = 1<<10;
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} else {
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/* K22 with new-style SDID? */
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break;
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}
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break;
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}
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case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
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/* K24FN256 */
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pflash_sector_size_bytes = 4<<10;
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num_blocks = 1;
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kinfo->flash_support = FS_PROGRAM_LONGWORD;
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kinfo->max_flash_prog_size = 1<<10;
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break;
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default:
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break;
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}
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break;
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case KINETIS_SDID_SERIESID_KL:
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/* KL-series */
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pflash_sector_size_bytes = 1<<10;
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nvm_sector_size_bytes = 1<<10;
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num_blocks = 1;
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kinfo->flash_support = FS_PROGRAM_LONGWORD;
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kinfo->max_flash_prog_size = 1<<10;
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break;
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default:
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break;
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}
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}
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if (pflash_sector_size_bytes == 0) {
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LOG_ERROR("MCU is unsupported");
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return ERROR_FLASH_OPER_UNSUPPORTED;
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}
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@ -1141,9 +1201,10 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
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break;
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case 0x0f:
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if (granularity == 3)
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if (pflash_sector_size_bytes >= 4<<10)
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nvm_size = 512<<10;
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else
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/* K20_100 */
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nvm_size = 256<<10;
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break;
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default:
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@ -1180,7 +1241,7 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
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break;
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case 0x0f:
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if (granularity == 3)
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if (pflash_sector_size_bytes >= 4<<10)
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pf_size = 1024<<10;
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else if (fcfg2_pflsh)
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pf_size = 512<<10;
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@ -1194,10 +1255,6 @@ static int kinetis_read_part_info(struct flash_bank *bank)
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LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
|
||||
nvm_size, pf_size, ee_size, fcfg2_pflsh);
|
||||
if (kinfo->klxx)
|
||||
num_blocks = 1;
|
||||
else
|
||||
num_blocks = kinetis_flash_params[granularity].num_blocks;
|
||||
|
||||
num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
|
||||
first_nvm_bank = num_pflash_blocks;
|
||||
|
@ -1214,9 +1271,6 @@ static int kinetis_read_part_info(struct flash_bank *bank)
|
|||
if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
|
||||
LOG_WARNING("Flash ordinal/bank number mismatch");
|
||||
reassign = 1;
|
||||
} else if (kinfo->granularity != granularity) {
|
||||
LOG_WARNING("Flash granularity mismatch");
|
||||
reassign = 1;
|
||||
} else {
|
||||
switch (kinfo->flash_class) {
|
||||
case FC_PFLASH:
|
||||
|
@ -1230,8 +1284,7 @@ static int kinetis_read_part_info(struct flash_bank *bank)
|
|||
(0x00000000 + bank->size * kinfo->bank_ordinal)) {
|
||||
LOG_WARNING("PFlash address range mismatch");
|
||||
reassign = 1;
|
||||
} else if (kinfo->sector_size !=
|
||||
kinetis_flash_params[granularity].pflash_sector_size_bytes) {
|
||||
} else if (kinfo->sector_size != pflash_sector_size_bytes) {
|
||||
LOG_WARNING("PFlash sector size mismatch");
|
||||
reassign = 1;
|
||||
} else {
|
||||
|
@ -1251,8 +1304,7 @@ static int kinetis_read_part_info(struct flash_bank *bank)
|
|||
(0x10000000 + bank->size * kinfo->bank_ordinal)) {
|
||||
LOG_WARNING("FlexNVM address range mismatch");
|
||||
reassign = 1;
|
||||
} else if (kinfo->sector_size !=
|
||||
kinetis_flash_params[granularity].nvm_sector_size_bytes) {
|
||||
} else if (kinfo->sector_size != nvm_sector_size_bytes) {
|
||||
LOG_WARNING("FlexNVM sector size mismatch");
|
||||
reassign = 1;
|
||||
} else {
|
||||
|
@ -1270,8 +1322,7 @@ static int kinetis_read_part_info(struct flash_bank *bank)
|
|||
} else if (bank->base != FLEXRAM) {
|
||||
LOG_WARNING("FlexRAM address mismatch");
|
||||
reassign = 1;
|
||||
} else if (kinfo->sector_size !=
|
||||
kinetis_flash_params[granularity].nvm_sector_size_bytes) {
|
||||
} else if (kinfo->sector_size != nvm_sector_size_bytes) {
|
||||
LOG_WARNING("FlexRAM sector size mismatch");
|
||||
reassign = 1;
|
||||
} else {
|
||||
|
@ -1293,21 +1344,19 @@ static int kinetis_read_part_info(struct flash_bank *bank)
|
|||
if (!reassign)
|
||||
return ERROR_OK;
|
||||
|
||||
kinfo->granularity = granularity;
|
||||
|
||||
if ((unsigned)bank->bank_number < num_pflash_blocks) {
|
||||
/* pflash, banks start at address zero */
|
||||
kinfo->flash_class = FC_PFLASH;
|
||||
bank->size = (pf_size / num_pflash_blocks);
|
||||
bank->base = 0x00000000 + bank->size * bank->bank_number;
|
||||
kinfo->sector_size = kinetis_flash_params[granularity].pflash_sector_size_bytes;
|
||||
kinfo->sector_size = pflash_sector_size_bytes;
|
||||
kinfo->protection_size = pf_size / 32;
|
||||
} else if ((unsigned)bank->bank_number < num_blocks) {
|
||||
/* nvm, banks start at address 0x10000000 */
|
||||
kinfo->flash_class = FC_FLEX_NVM;
|
||||
bank->size = (nvm_size / num_nvm_blocks);
|
||||
bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
|
||||
kinfo->sector_size = kinetis_flash_params[granularity].nvm_sector_size_bytes;
|
||||
kinfo->sector_size = nvm_sector_size_bytes;
|
||||
kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
|
||||
} else if ((unsigned)bank->bank_number == num_blocks) {
|
||||
LOG_ERROR("FlexRAM support not yet implemented");
|
||||
|
|
Loading…
Reference in New Issue