- reverted some of the changes that possibly broke arm926ejs. Waiting
for a bit more info before I can tell with confidence whether or not this would have any effect. - worked on error propagation and output for flash git-svn-id: svn://svn.berlios.de/openocd/trunk@539 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
parent
7abe97565e
commit
35b3c95299
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@ -211,10 +211,9 @@ int loadDriver(ecosflash_flash_bank_t *info)
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int retval;
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if ((retval = image_read_section(&image, i, 0x0, image.sections[i].size, buffer, &buf_cnt)) != ERROR_OK)
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{
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LOG_ERROR("image_read_section failed with error code: %i", retval);
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free(buffer);
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image_close(&image);
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return ERROR_FLASH_BANK_INVALID;
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return retval;
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}
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target_write_buffer(target, image.sections[i].base_address, buf_cnt, buffer);
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image_size += buf_cnt;
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@ -303,7 +302,7 @@ int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
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if (flashErr != 0x0)
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{
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LOG_ERROR("Flash erase failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
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return ERROR_JTAG_DEVICE_ERROR;
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return ERROR_FAIL;
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}
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return ERROR_OK;
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@ -362,7 +361,7 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l
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if (flashErr != 0x0)
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{
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LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
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return ERROR_JTAG_DEVICE_ERROR;
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return ERROR_FAIL;
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}
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}
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return ERROR_OK;
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@ -618,13 +618,12 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm
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if (argc < 1)
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{
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (!target)
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{
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LOG_ERROR("no target selected");
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return ERROR_OK;
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return ERROR_FAIL;
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}
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duration_start_measure(&duration);
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@ -649,7 +648,6 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm
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}
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retval = flash_write(target, &image, &written, auto_erase);
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if (retval != ERROR_OK)
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{
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image_close(&image);
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@ -923,7 +921,7 @@ int flash_erase_address_range(target_t *target, u32 addr, u32 length)
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/* write (optional verify) an image to flash memory of the given target */
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int flash_write(target_t *target, image_t *image, u32 *written, int erase)
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{
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int retval;
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int retval=ERROR_OK;
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int section;
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u32 section_offset;
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@ -1046,7 +1044,7 @@ int flash_write(target_t *target, image_t *image, u32 *written, int erase)
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*written += run_size; /* add run size to total written counter */
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}
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return ERROR_OK;
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return retval;
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}
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int handle_flash_auto_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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@ -298,6 +298,7 @@ void command_print(command_context_t *context, char *format, ...)
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int find_and_run_command(command_context_t *context, command_t *commands, char *words[], int num_words, int start_word)
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{
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command_t *c;
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int retval = ERROR_COMMAND_SYNTAX_ERROR;
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if (unique_length_dirty)
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{
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@ -321,6 +322,7 @@ int find_and_run_command(command_context_t *context, command_t *commands, char *
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if (!c->handler)
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{
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command_print(context, "No handler for command");
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retval = ERROR_COMMAND_SYNTAX_ERROR;
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break;
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}
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else
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@ -330,6 +332,12 @@ int find_and_run_command(command_context_t *context, command_t *commands, char *
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{
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command_print(context, "Syntax error:");
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command_print_help_line(context, c, 0);
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} else if (retval != ERROR_OK)
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{
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/* we do not print out an error message because the command *should*
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* have printed out an error
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*/
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LOG_DEBUG("Command failed with error code %d", retval);
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}
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return retval;
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}
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@ -347,7 +355,7 @@ int find_and_run_command(command_context_t *context, command_t *commands, char *
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}
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command_print(context, "Command %s not found", words[start_word]);
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return ERROR_OK;
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return retval;
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}
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int command_run_line(command_context_t *context, char *line)
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@ -34,6 +34,20 @@ typedef struct command_context_s
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enum command_mode mode;
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struct command_s *commands;
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int current_target;
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/* Execute a command.
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*
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* If the command fails, it *MUST* return a value != ERROR_OK
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* (many commands break this rule, patches welcome!)
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*
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* This is *especially* important for commands such as writing
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* to flash or verifying memory. The reason is that those commands
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* can be used by programs to determine if the operation succeded
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* or not. If the operation failed, then a program can try
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* an alternative approach.
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*
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* Returning ERROR_COMMAND_SYNTAX_ERROR will have the effect of
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* printing out the syntax of the command.
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*/
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int (*output_handler)(struct command_context_s *context, char* line);
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void *output_handler_priv;
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} command_context_t;
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@ -23,7 +23,8 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script
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target/at91r40008.cfg target/lpc2148.cfg target/lpc2294.cfg target/sam7s256.cfg \
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target/sam7x256.cfg target/str710.cfg target/str912.cfg target/nslu2.cfg target/pxa255_sst.cfg \
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target/pxa255.cfg target/zy1000.cfg event/zy1000_reset.script event/at91sam9260_reset.script target/at91sam9260.cfg \
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target/wi-9c.cfg event/wi-9c_reset.script event/pxa255_reset.script target/stm32.cfg target/xba_revA3.cfg event/xba_revA3.script
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target/wi-9c.cfg event/wi-9c_reset.script event/pxa255_reset.script target/stm32.cfg target/xba_revA3.cfg event/xba_revA3.script \
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ecos/at91eb40a.elf
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@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target)
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if (target->state == TARGET_HALTED)
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{
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LOG_WARNING("target was already halted");
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LOG_DEBUG("target was already halted");
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return ERROR_OK;
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}
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@ -733,8 +733,18 @@ int arm7_9_poll(target_t *target)
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return ERROR_OK;
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}
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/*
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Some -S targets (ARM966E-S in the STR912 isn't affected, ARM926EJ-S
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in the LPC3180 and AT91SAM9260 is affected) completely stop the JTAG clock
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while the core is held in reset. It isn't possible to program the halt
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condition once reset was asserted, hence a hook that allows the target to set
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up its reset-halt condition prior to asserting reset.
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*/
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int arm7_9_assert_reset(target_t *target)
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{
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
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if (!(jtag_reset_config & RESET_HAS_SRST))
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@ -743,10 +753,32 @@ int arm7_9_assert_reset(target_t *target)
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return ERROR_FAIL;
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}
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/*
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* Some targets do not support communication while TRST is asserted. We need to
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* set up the reset vector catch here.
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*
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* If TRST is in use, then these settings will be reset anyway, so setting them
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* here is harmless.
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*/
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if (arm7_9->has_vector_catch)
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{
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/* program vector catch register to catch reset vector */
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embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_VEC_CATCH], 0x1);
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}
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else
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{
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/* program watchpoint unit to match on reset vector address */
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embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0x3);
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embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0x0);
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embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x100);
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embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], 0xf7);
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}
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/* we can't know what state the target is in as we might e.g.
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* be resetting after a power dropout, so we need to issue a tms/srst
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*/
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/* assert SRST and TRST */
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/* system would get ouf sync if we didn't reset test-logic, too */
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jtag_add_reset(1, 1);
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target->state = TARGET_RESET;
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jtag_add_sleep(50000);
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/* at this point we TRST *may* be deasserted */
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arm7_9_prepare_reset_halt(target);
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armv4_5_invalidate_core_regs(target);
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return ERROR_OK;
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return ERROR_OK;
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}
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int arm7_9_prepare_reset_halt(target_t *target)
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{
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if ((target->reset_mode!=RESET_HALT)&&(target->reset_mode!=RESET_INIT))
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{
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return ERROR_OK;
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}
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return arm7_9_halt(target);
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}
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int arm7_9_halt(target_t *target)
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{
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armv4_5_common_t *armv4_5 = target->arch_info;
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@ -928,7 +947,7 @@ int arm7_9_halt(target_t *target)
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if (target->state == TARGET_HALTED)
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{
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LOG_WARNING("target was already halted");
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LOG_DEBUG("target was already halted");
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return ERROR_OK;
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}
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@ -429,7 +429,7 @@ int cortex_m3_halt(target_t *target)
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if (target->state == TARGET_HALTED)
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{
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LOG_WARNING("target was already halted");
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LOG_DEBUG("target was already halted");
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return ERROR_OK;
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}
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Binary file not shown.
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@ -2053,14 +2053,13 @@ int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, ch
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if (argc < 1)
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{
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command_print(cmd_ctx, "usage: verify_image <file> [offset] [type]");
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return ERROR_OK;
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (!target)
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{
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LOG_ERROR("no target selected");
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return ERROR_OK;
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return ERROR_FAIL;
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}
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duration_start_measure(&duration);
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@ -2078,9 +2077,9 @@ int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, ch
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image.start_address_set = 0;
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if (image_open(&image, args[0], (argc == 3) ? args[2] : NULL) != ERROR_OK)
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if ((retval=image_open(&image, args[0], (argc == 3) ? args[2] : NULL)) != ERROR_OK)
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{
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return ERROR_OK;
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return retval;
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}
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image_size = 0x0;
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@ -14,7 +14,6 @@ reset_config srst_only srst_pulls_trst
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
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target arm7tdmi little reset_init 0 arm7tdmi-s_r4
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# speed up memory downloads
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@ -24,6 +23,9 @@ arm7_9 dcc_downloads enable
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# OpenOCD does not have a flash driver for for AT91FR40162S
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target_script 0 reset event/at91eb40a_reset.script
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#flash driver
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flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
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# required for usable performance. Used for lots of
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# other things than flash programming.
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working_area 0 0x00000000 0x20000 nobackup
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@ -14,7 +14,6 @@ reset_config srst_only srst_pulls_trst
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
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target arm7tdmi little reset_init 0 arm7tdmi-s_r4
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# at CPU CLK <32kHz this must be disabled
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@ -22,7 +21,7 @@ arm7 fast_memory_access enable
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arm7_9 dcc_downloads enable
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flash bank ecosflash 0x01000000 0x200000 2 2 0 /rom/at91eb40a.elf
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flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
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target_script 0 reset event/zy1000_reset.script
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# required for usable performance. Used for lots of
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@ -1263,7 +1263,7 @@ int xscale_halt(target_t *target)
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if (target->state == TARGET_HALTED)
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{
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LOG_WARNING("target was already halted");
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LOG_DEBUG("target was already halted");
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return ERROR_OK;
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}
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else if (target->state == TARGET_UNKNOWN)
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