interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

tcl: stm32mp15x: fix "reset halt" on CM4 in engineering boot 

The state machine of cortex-m have to pass through a set of state
before it get in "halted".

Add one more "arp_poll" to achieve the proper state during a
"reset halt" command in engineering boot.

Change-Id: I90828bf20ef75bd4018f8b911f727ae69c4d6e8f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5649
Tested-by: jenkins
Reviewed-by: Richard Braun <rbraun@sceen.net>
This commit is contained in:
Antonio Borneo 2020-05-05 18:11:47 +02:00
parent fdad56ecb0
commit 2a8303b0bd
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
tcl/target/stm32mp15x.cfg
View File

@ -114,7 +114,7 @@ $_CHIPNAME.ap2 configure -event reset-deassert-pre {dbgmcu_enable_debug}
$_CHIPNAME.cpu0 configure -event reset-deassert-pre {$::_CHIPNAME.cpu0 arp_examine}
$_CHIPNAME.cpu1 configure -event reset-deassert-pre {$::_CHIPNAME.cpu1 arp_examine allow-defer}
$_CHIPNAME.cpu0 configure -event reset-deassert-post {toggle_cpu0_dbg_claim0}
$_CHIPNAME.cm4 configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_examine;if {[$::_CHIPNAME.ap2 curstate] == "halted"} {$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_halt}}
$_CHIPNAME.cm4 configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_examine;if {[$::_CHIPNAME.ap2 curstate] == "halted"} {$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_halt}}
$_CHIPNAME.ap1 configure -event examine-start {dap init}
$_CHIPNAME.ap2 configure -event examine-start {dbgmcu_enable_debug}
$_CHIPNAME.cpu0 configure -event examine-end {detect_cpu1}