From 2903daa9f1456320dfaf18fe3b63fd87c9adcc37 Mon Sep 17 00:00:00 2001
From: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Date: Thu, 22 Jun 2023 19:28:52 +0300
Subject: [PATCH] [target/riscv] support for smp group manipulation
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I469453d95e7c1640a91bc60d80c854404e508535
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
---
doc/openocd.texi | 12 ++++++++++++
src/target/riscv/riscv.c | 3 +++
2 files changed, 15 insertions(+)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index bae0c91a8..d1edc91e6 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -10812,6 +10812,18 @@ When utilizing version 0.11 of the RISC-V Debug Specification,
and DBUS registers, respectively.
@end deffn
+@deffn {Command} {riscv smp} [on|off]
+Display, enable or disable SMP handling mode. This command is needed only if
+user wants to temporary @b{disable} SMP handling for an existing SMP group
+(see @code{aarch64 smp} for additional information). To define an SMP
+group the command @code{target smp} should be used.
+@end deffn
+
+@deffn {Command} {riscv smp_gdb} [core_id]
+Display/set the current core displayed in GDB. This is needed only if
+@code{riscv smp} was used.
+@end deffn
+
@deffn {Command} {riscv use_bscan_tunnel} value
Enable or disable use of a BSCAN tunnel to reach the Debug Module. Supply the
width of the DM transport TAP's instruction register to enable. Supply a
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 94fbb6788..7b7775d78 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -4383,6 +4383,9 @@ static const struct command_registration riscv_command_handlers[] = {
.usage = "",
.chain = semihosting_common_handlers
},
+ {
+ .chain = smp_command_handlers
+ },
COMMAND_REGISTRATION_DONE
};