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flash/stm32l4x: add STM32C071xx support 

I successfully programmed a NUCLEO-C071RB with these changes.

Change-Id: Ib57a77fa18f8a0e8c882e2250d6111c588d76887
Signed-off-by: David (Pololu) <dev-david@pololu.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8525
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
David (Pololu) 2024-12-18 13:49:00 -08:00 committed by Tomas Vanek
parent 5233312ea5
commit 250ab1008b
4 changed files with 28 additions and 1 deletions
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2
doc/openocd.texi
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@ -8001,7 +8001,7 @@ The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn @end deffn
@deffn {Flash Driver} {stm32l4x} @deffn {Flash Driver} {stm32l4x}
All members of the STM32 G0, G4, L4, L4+, L5, U0, U5, WB and WL All members of the STM32 C0, G0, G4, L4, L4+, L5, U0, U5, WB and WL
microcontroller families from STMicroelectronics include internal flash microcontroller families from STMicroelectronics include internal flash
and use ARM Cortex-M0+, M4 and M33 cores. and use ARM Cortex-M0+, M4 and M33 cores.
The driver automatically recognizes a number of these chips using The driver automatically recognizes a number of these chips using

17
src/flash/nor/stm32l4x.c
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@ -303,6 +303,10 @@ static const struct stm32l4_rev stm32c03xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1000, "A" }, { 0x1001, "Z" },
}; };
static const struct stm32l4_rev stm32c071xx_revs[] = {
{ 0x1001, "Z" },
};
static const struct stm32l4_rev stm32g05_g06xx_revs[] = { static const struct stm32l4_rev stm32g05_g06xx_revs[] = {
{ 0x1000, "A" }, { 0x1000, "A" },
}; };
@ -442,6 +446,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x1FFF7000, .otp_base = 0x1FFF7000,
.otp_size = 1024, .otp_size = 1024,
}, },
{
.id = DEVID_STM32C071XX,
.revs = stm32c071xx_revs,
.num_revs = ARRAY_SIZE(stm32c071xx_revs),
.device_str = "STM32C071xx",
.max_flash_size_kb = 128,
.flags = F_NONE,
.flash_regs_base = 0x40022000,
.fsize_addr = 0x1FFF75A0,
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
{ {
.id = DEVID_STM32U53_U54XX, .id = DEVID_STM32U53_U54XX,
.revs = stm32u53_u54xx_revs, .revs = stm32u53_u54xx_revs,
@ -1989,6 +2005,7 @@ static int stm32l4_probe(struct flash_bank *bank)
case DEVID_STM32L43_L44XX: case DEVID_STM32L43_L44XX:
case DEVID_STM32C01XX: case DEVID_STM32C01XX:
case DEVID_STM32C03XX: case DEVID_STM32C03XX:
case DEVID_STM32C071XX:
case DEVID_STM32G05_G06XX: case DEVID_STM32G05_G06XX:
case DEVID_STM32G07_G08XX: case DEVID_STM32G07_G08XX:
case DEVID_STM32U031XX: case DEVID_STM32U031XX:

1
src/flash/nor/stm32l4x.h
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@ -108,6 +108,7 @@
#define DEVID_STM32U57_U58XX 0x482 #define DEVID_STM32U57_U58XX 0x482
#define DEVID_STM32U073_U083XX 0x489 #define DEVID_STM32U073_U083XX 0x489
#define DEVID_STM32WBA5X 0x492 #define DEVID_STM32WBA5X 0x492
#define DEVID_STM32C071XX 0x493
#define DEVID_STM32WB1XX 0x494 #define DEVID_STM32WB1XX 0x494
#define DEVID_STM32WB5XX 0x495 #define DEVID_STM32WB5XX 0x495
#define DEVID_STM32WB3XX 0x496 #define DEVID_STM32WB3XX 0x496

9
tcl/board/st_nucleo_c0.cfg Normal file
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@ -0,0 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-or-later
source [find interface/stlink.cfg]
transport select dapdirect_swd
source [find target/stm32c0x.cfg]
reset_config srst_only