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cortex_m: Use the correct method to access registers 

Convert the DWT register store to use a byte array and fix the byte order
bug uncovered by that. Also fix an incorrect access of the PC value.

Change-Id: Idb5acab71bdf5a96895c358324b05c335e4d32ca
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2476
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Andreas Fritiofson 2015-01-18 15:34:42 +01:00
parent 0ecb0396d4
commit 24e99ac6d9
1 changed files with 10 additions and 4 deletions
src/target
cortex_m.c

14
src/target/cortex_m.c
View File

@ -473,7 +473,7 @@ static int cortex_m_debug_entry(struct target *target)
LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
arm_mode_name(arm->core_mode),
*(uint32_t *)(arm->pc->value),
buf_get_u32(arm->pc->value, 0, 32),
target_state_name(target));
if (armv7m->post_debug_entry) {
@ -1646,14 +1646,20 @@ static int cortex_m_init_target(struct command_context *cmd_ctx,
struct dwt_reg_state {
struct target *target;
uint32_t addr;
uint32_t value; /* scratch/cache */
uint8_t value[4]; /* scratch/cache */
};
static int cortex_m_dwt_get_reg(struct reg *reg)
{
struct dwt_reg_state *state = reg->arch_info;
return target_read_u32(state->target, state->addr, &state->value);
uint32_t tmp;
int retval = target_read_u32(state->target, state->addr, &tmp);
if (retval != ERROR_OK)
return retval;
buf_set_u32(state->value, 0, 32, tmp);
return ERROR_OK;
}
static int cortex_m_dwt_set_reg(struct reg *reg, uint8_t *buf)
@ -1708,7 +1714,7 @@ static void cortex_m_dwt_addreg(struct target *t, struct reg *r, struct dwt_reg
r->name = d->name;
r->size = d->size;
r->value = &state->value;
r->value = state->value;
r->arch_info = state;
r->type = &dwt_reg_type;
}