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Merge pull request #916 from riscv/getreg_assert 

target/riscv: Don't assert in riscv013_get_register()
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Tim Newsome 2023-09-14 11:37:01 -07:00 committed by GitHub
parent 67c2835997 2c2135a0cb
commit 2427f585c9
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1 changed files with 5 additions and 2 deletions
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src/target/riscv/riscv.c
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@ -4945,8 +4945,11 @@ int riscv_get_register(struct target *target, riscv_reg_t *value,
*/ */
int riscv_save_register(struct target *target, enum gdb_regno regid) int riscv_save_register(struct target *target, enum gdb_regno regid)
{ {
assert(target->state == TARGET_HALTED && if (target->state != TARGET_HALTED) {
"Doesn't make sense to populate register cache on non-halted targets."); LOG_TARGET_ERROR(target, "Can't save register %s on a hart that is not halted.",
gdb_regno_name(regid));
return ERROR_FAIL;
}
assert(gdb_regno_cacheable(regid, /* is write? */ false) && assert(gdb_regno_cacheable(regid, /* is write? */ false) &&
"Only cacheable registers can be saved."); "Only cacheable registers can be saved.");