arm11 burst writes are now only enabled for writes larger than 1 word. Single word writes are frequently used from reset init scripts to non-memory peripherals.

doc/openocd.texi

@@ -5737,7 +5737,11 @@ one bit in the encoding, effecively a fifth parameter.)
 
 @deffn Command {arm11 memwrite burst} [value]
 Displays the value of the memwrite burst-enable flag,
-which is enabled by default.
+which is enabled by default. Burst writes are only used
+for memory writes larger than 1 word. Single word writes
+are likely to be from reset init scripts and those writes
+are often to non-memory locations which could easily have
+many wait states, which could easily break burst writes.
 If @var{value} is defined, first assigns that.
 @end deffn
 

src/target/arm11.c

@@ -1408,6 +1408,15 @@ int arm11_write_memory_inner(struct target_s *target, uint32_t address, uint32_t
 	if (retval != ERROR_OK)
 		return retval;
 
+	/* burst writes are not used for single words as those may well be
+	 * reset init script writes.
+	 *
+	 * The other advantage is that as burst writes are default, we'll
+	 * now exercise both burst and non-burst code paths with the
+	 * default settings, increasing code coverage.
+	 */
+	bool burst = arm11_config_memwrite_burst && (count > 1);
+
 	switch (size)
 	{
 	case 1:
@@ -1463,7 +1472,7 @@ int arm11_write_memory_inner(struct target_s *target, uint32_t address, uint32_t
 		/** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
 		uint32_t *words = (uint32_t*)buffer;
 
-		if (!arm11_config_memwrite_burst)
+		if (!burst)
 		{
 			/* STC p14,c5,[R0],#4 */
 			/* STC p14,c5,[R0]*/
@@ -1501,7 +1510,7 @@ int arm11_write_memory_inner(struct target_s *target, uint32_t address, uint32_t
 					(unsigned) (address + size * count),
 					(unsigned) r0);
 
-			if (arm11_config_memwrite_burst)
+			if (burst)
 				LOG_ERROR("use 'arm11 memwrite burst disable' to disable fast burst mode");
 
 			if (arm11_config_memwrite_error_fatal)