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tcl/target: remove rp2040-core0.cfg 

rp2040-core0.cfg configuration file was intended for a special adapter
which selects a SWD multidrop target on its own. This means
that rp2040-core0.cfg is totally unusable with a standard SWD
adapter. The file was marked as deprecated in 0.12 release.

The reworked rp2040.cfg can be restricted to use just one core:
  openocd ... -c 'set USE_CORE 0' -f target/rp2040.cfg

Remove the obsoleted config.

Change-Id: Id886471622bb4a8cb83f5c4c3660657407aaaf74
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7326
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Tomas Vanek 2022-11-03 10:32:36 +01:00 committed by Antonio Borneo
parent 8af4d4462f
commit 228fe7300c
1 changed files with 0 additions and 52 deletions
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52
tcl/target/rp2040-core0.cfg
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# SPDX-License-Identifier: GPL-2.0-or-later
# RP2040 is a microcontroller with dual Cortex-M0+ core.
# https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
# The device requires multidrop SWD for debug.
# This configuration file is intended for a special adapter
# which selects a multidrop target on its own.
# Cannot be used with a standard SWD adapter!
echo "Warn : rp2040-core0.cfg configuration file is deprecated and will be"
echo " removed in the next release. Use following parameters instead:"
echo " -c 'set USE_CORE 0' -f target/rp2040.cfg"
transport select swd
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME rp2040
}
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x10000
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x01002927
}
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
# Backup the work area. The flash probe runs an algorithm on the target CPU.
# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
set _FLASHNAME $_CHIPNAME.flash
set _FLASHSIZE 0x200000
set _FLASHBASE 0x10000000
flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
# srst does not exist; use SYSRESETREQ to perform a soft reset
cortex_m reset_config sysresetreq