tcl/target/c100helper: fix syntax errors
Fixes: 64d89d5ee1
("tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change")
These syntax errors were caught by tclint v0.2.5
(https://github.com/nmoroze/tclint):
```
tclint tcl/target/c100helper.tcl | grep "syntax error"
```
Change-Id: I511c54353c4853560adca6b4852d48df2aade283
Signed-off-by: Noah Moroze <noahmoroze@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8280
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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@ -176,7 +176,7 @@ proc setupAmbaClk {} {
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mmw $CLKCORE_AHB_CLK_CNTRL [expr {($x << 16) + ($w << 8) + $y}] 0x0
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# wait for PLL to lock
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echo "Waiting for Amba PLL to lock"
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while {[expr {[mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK]} == 0} { sleep 1 }
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while {[mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK == 0} { sleep 1 }
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# remove the internal PLL bypass
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mmw $CLKCORE_AHB_CLK_CNTRL 0x0 $AHB_PLL_BY_CTRL
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# remove PLL from BYPASS mode using MUX
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@ -250,7 +250,7 @@ proc setupArmClk {} {
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mmw $CLKCORE_ARM_CLK_CNTRL [expr {($x << 16) + ($w << 8) + $y}] 0x0
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# wait for PLL to lock
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echo "Waiting for Amba PLL to lock"
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while {[expr {[mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK]} == 0} { sleep 1 }
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while {[mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK == 0} { sleep 1 }
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# remove the internal PLL bypass
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mmw $CLKCORE_ARM_CLK_CNTRL 0x0 $ARM_PLL_BY_CTRL
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# remove PLL from BYPASS mode using MUX
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