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FreeRTOS: Fix thread reg list for Cortex-M7 

This updates the FreeRTOS module to use the M4F FPU stacking also for the
FPV5_SP and FPV5_DP FPUs, which are found on the Cortex-M7. The FPUs are
in fact different than the FPV4_SP found on the M4, but the register
stacking is the same.

Signed-off-by: Frank Dischner <frank.dischner@gmail.com>
Change-Id: I74c45d2cfb55f55e6c557f2450068ad3c2fe9497
Reviewed-on: https://review.openocd.org/c/openocd/+/6939
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Frank Dischner 2022-04-20 21:49:44 -05:00 committed by Antonio Borneo
parent cec3b62328
commit 219cb9598a
1 changed files with 2 additions and 1 deletions
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src/rtos/FreeRTOS.c
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@ -437,7 +437,8 @@ static int freertos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
int cm4_fpu_enabled = 0;
struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
if (is_armv7m(armv7m_target)) {
if (armv7m_target->fp_feature == FPV4_SP) {
if ((armv7m_target->fp_feature == FPV4_SP) || (armv7m_target->fp_feature == FPV5_SP) ||
(armv7m_target->fp_feature == FPV5_DP)) {
/* Found ARM v7m target which includes a FPU */
uint32_t cpacr;