interesting
/
riscv-openocd
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Michael Bruck: 

- force simulate_reset_on_next_halt when target state is initially detected
- print out method of debug entry
- fix VCR activation (didn't work before)

git-svn-id: svn://svn.berlios.de/openocd/trunk@452 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2008-03-06 12:01:52 +00:00
parent c6c6cd0ffd
commit 209d7c0edc
2 changed files with 31 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/target/arm11.c
View File

@ -331,8 +331,14 @@ void arm11_check_init(arm11_common_t * arm11, u32 * dscr)
/* add further reset initialization here */ /* add further reset initialization here */
arm11->simulate_reset_on_next_halt = true;
if (*dscr & ARM11_DSCR_CORE_HALTED) if (*dscr & ARM11_DSCR_CORE_HALTED)
{ {
/** \todo TODO: this needs further scrutiny because
* arm11_on_enter_debug_state() never gets properly called
*/
arm11->target->state = TARGET_HALTED; arm11->target->state = TARGET_HALTED;
arm11->target->debug_reason = arm11_get_DSCR_debug_reason(*dscr); arm11->target->debug_reason = arm11_get_DSCR_debug_reason(*dscr);
} }

32
src/target/arm11_dbgtap.c
View File

@ -274,14 +274,32 @@ enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
{ {
switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK) switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
{ {
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT: return DBG_REASON_DBGRQ; case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT: return DBG_REASON_BREAKPOINT; INFO("Debug entry: JTAG HALT");
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT: return DBG_REASON_WATCHPOINT; return DBG_REASON_DBGRQ;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION: return DBG_REASON_BREAKPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ: return DBG_REASON_DBGRQ; case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH: return DBG_REASON_BREAKPOINT; INFO("Debug entry: breakpoint");
return DBG_REASON_BREAKPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
INFO("Debug entry: watchpoint");
return DBG_REASON_WATCHPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
INFO("Debug entry: BKPT instruction");
return DBG_REASON_BREAKPOINT;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
INFO("Debug entry: EDBGRQ signal");
return DBG_REASON_DBGRQ;
case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
INFO("Debug entry: VCR vector catch");
return DBG_REASON_BREAKPOINT;
default: default:
INFO("Debug entry: unknown");
return DBG_REASON_DBGRQ; return DBG_REASON_DBGRQ;
} }
}; };
@ -752,7 +770,7 @@ void arm11_sc7_set_vcr(arm11_common_t * arm11, u32 value)
{ {
arm11_sc7_action_t set_vcr; arm11_sc7_action_t set_vcr;
set_vcr.write = 0; set_vcr.write = true;
set_vcr.address = ARM11_SC7_VCR; set_vcr.address = ARM11_SC7_VCR;
set_vcr.value = value; set_vcr.value = value;