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Document the buspirate interface driver. 

Change-Id: Iaff13fc5187041a840f4f00eb6b4ee52880cf47e
Signed-off-by: R. Diez <rdiezmail-openocd@yahoo.de>
Reviewed-on: http://openocd.zylin.com/6231
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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R. Diez 2021-05-10 18:10:30 +02:00 committed by Antonio Borneo
parent 3c4206936d
commit 1f54a0860f
1 changed files with 62 additions and 0 deletions
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doc/openocd.texi
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@ -3264,6 +3264,68 @@ Specifies the TCP/IP address of the SystemVerilog DPI server interface.
@end deffn @end deffn
@deffn {Interface Driver} {buspirate}
This driver is for the Bus Pirate (see @url{http://dangerousprototypes.com/docs/Bus_Pirate}) and compatible devices.
It uses a simple data protocol over a serial port connection.
Most hardware development boards have a UART, a real serial port, or a virtual USB serial device, so this driver
allows you to start building your own JTAG adapter without the complexity of a custom USB connection.
@deffn {Config Command} {buspirate_port} serial_port
Specify the serial port's filename. For example:
@example
buspirate_port /dev/ttyUSB0
@end example
@end deffn
@deffn {Config Command} {buspirate_speed} (normal|fast)
Set the communication speed to 115k (normal) or 1M (fast). For example:
@example
buspirate_mode normal
@end example
@end deffn
@deffn {Config Command} {buspirate_mode} (normal|open-drain)
Set the Bus Pirate output mode.
@itemize @minus
@item In normal mode (push/pull), do not enable the pull-ups, and do not connect I/O header pin VPU to JTAG VREF.
@item In open drain mode, you will then need to enable the pull-ups.
@end itemize
For example:
@example
buspirate_mode normal
@end example
@end deffn
@deffn {Config Command} {buspirate_pullup} (0|1)
Whether to connect (1) or not (0) the I/O header pin VPU (JTAG VREF)
to the pull-up/pull-down resistors on MOSI (JTAG TDI), CLK (JTAG TCK), MISO (JTAG TDO) and CS (JTAG TMS).
For example:
@example
buspirate_pullup 0
@end example
@end deffn
@deffn {Config Command} {buspirate_vreg} (0|1)
Whether to enable (1) or disable (0) the built-in voltage regulator,
which can be used to supply power to a test circuit through
I/O header pins +3V3 and +5V. For example:
@example
buspirate_vreg 0
@end example
@end deffn
@deffn {Command} {buspirate_led} (0|1)
Turns the Bus Pirate's LED on (1) or off (0). For example:
@end deffn
@example
buspirate_led 1
@end example
@end deffn
@section Transport Configuration @section Transport Configuration
@cindex Transport @cindex Transport
As noted earlier, depending on the version of OpenOCD you use, As noted earlier, depending on the version of OpenOCD you use,