retire obsolete mXY_phys commands. Handled by generic memory read/modify commands and target read/write physical memory callbacks.
This commit is contained in:
parent
2d45a10dfd
commit
1e5daf5886
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@ -34,8 +34,6 @@
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int arm720t_register_commands(struct command_context_s *cmd_ctx);
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int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm720t_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm720t_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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/* forward declarations */
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int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
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@ -514,14 +512,6 @@ int arm720t_register_commands(struct command_context_s *cmd_ctx)
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register_command(cmd_ctx, arm720t_cmd, "cp15", arm720t_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <opcode> [value]");
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register_command(cmd_ctx, arm720t_cmd, "mdw_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory words <physical addr> [count]");
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register_command(cmd_ctx, arm720t_cmd, "mdh_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory half-words <physical addr> [count]");
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register_command(cmd_ctx, arm720t_cmd, "mdb_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory bytes <physical addr> [count]");
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register_command(cmd_ctx, arm720t_cmd, "mww_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory word <physical addr> <value>");
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register_command(cmd_ctx, arm720t_cmd, "mwh_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory half-word <physical addr> <value>");
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register_command(cmd_ctx, arm720t_cmd, "mwb_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory byte <physical addr> <value>");
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return ERROR_OK;
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}
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@ -584,55 +574,3 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch
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return ERROR_OK;
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}
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int arm720t_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm7tdmi_common_t *arm7tdmi;
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arm720t_common_t *arm720t;
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arm_jtag_t *jtag_info;
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if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM720t target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_md_phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu);
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}
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int arm720t_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm7tdmi_common_t *arm7tdmi;
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arm720t_common_t *arm720t;
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arm_jtag_t *jtag_info;
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if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM720t target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu);
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}
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@ -34,8 +34,6 @@
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int arm920t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm920t_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm920t_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm920t_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm920t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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int arm920t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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@ -726,14 +724,6 @@ int arm920t_register_commands(struct command_context_s *cmd_ctx)
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register_command(cmd_ctx, arm920t_cmd, "cp15i", arm920t_handle_cp15i_command, COMMAND_EXEC, "display/modify cp15 (interpreted access) <opcode> [value] [address]");
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register_command(cmd_ctx, arm920t_cmd, "cache_info", arm920t_handle_cache_info_command, COMMAND_EXEC, "display information about target caches");
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register_command(cmd_ctx, arm920t_cmd, "mdw_phys", arm920t_handle_md_phys_command, COMMAND_EXEC, "display memory words <physical addr> [count]");
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register_command(cmd_ctx, arm920t_cmd, "mdh_phys", arm920t_handle_md_phys_command, COMMAND_EXEC, "display memory half-words <physical addr> [count]");
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register_command(cmd_ctx, arm920t_cmd, "mdb_phys", arm920t_handle_md_phys_command, COMMAND_EXEC, "display memory bytes <physical addr> [count]");
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register_command(cmd_ctx, arm920t_cmd, "mww_phys", arm920t_handle_mw_phys_command, COMMAND_EXEC, "write memory word <physical addr> <value>");
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register_command(cmd_ctx, arm920t_cmd, "mwh_phys", arm920t_handle_mw_phys_command, COMMAND_EXEC, "write memory half-word <physical addr> <value>");
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register_command(cmd_ctx, arm920t_cmd, "mwb_phys", arm920t_handle_mw_phys_command, COMMAND_EXEC, "write memory byte <physical addr> <value>");
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register_command(cmd_ctx, arm920t_cmd, "read_cache", arm920t_handle_read_cache_command, COMMAND_EXEC, "display I/D cache content");
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register_command(cmd_ctx, arm920t_cmd, "read_mmu", arm920t_handle_read_mmu_command, COMMAND_EXEC, "display I/D mmu content");
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@ -1425,55 +1415,3 @@ int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *c
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return armv4_5_handle_cache_info_command(cmd_ctx, &arm920t->armv4_5_mmu.armv4_5_cache);
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}
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int arm920t_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm9tdmi_common_t *arm9tdmi;
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arm920t_common_t *arm920t;
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arm_jtag_t *jtag_info;
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if (arm920t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm920t) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM920t target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_md_phys_command(cmd_ctx, cmd, args, argc, target, &arm920t->armv4_5_mmu);
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}
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int arm920t_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm9tdmi_common_t *arm9tdmi;
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arm920t_common_t *arm920t;
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arm_jtag_t *jtag_info;
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if (arm920t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm920t) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM920t target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm920t->armv4_5_mmu);
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}
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@ -37,8 +37,6 @@
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int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_cache_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_read_cache_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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int arm926ejs_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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@ -835,14 +833,6 @@ int arm926ejs_register_commands(struct command_context_s *cmd_ctx)
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register_command(cmd_ctx, arm926ejs_cmd, "cache_info", arm926ejs_handle_cache_info_command, COMMAND_EXEC, "display information about target caches");
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register_command(cmd_ctx, arm926ejs_cmd, "mdw_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory words <physical addr> [count]");
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register_command(cmd_ctx, arm926ejs_cmd, "mdh_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory half-words <physical addr> [count]");
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register_command(cmd_ctx, arm926ejs_cmd, "mdb_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory bytes <physical addr> [count]");
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register_command(cmd_ctx, arm926ejs_cmd, "mww_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory word <physical addr> <value>");
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register_command(cmd_ctx, arm926ejs_cmd, "mwh_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory half-word <physical addr> <value>");
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register_command(cmd_ctx, arm926ejs_cmd, "mwb_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory byte <physical addr> <value>");
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return retval;
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}
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@ -928,58 +918,6 @@ int arm926ejs_handle_cache_info_command(struct command_context_s *cmd_ctx, char
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return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
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}
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int arm926ejs_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm9tdmi_common_t *arm9tdmi;
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arm926ejs_common_t *arm926ejs;
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arm_jtag_t *jtag_info;
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if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_md_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu);
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}
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int arm926ejs_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm9tdmi_common_t *arm9tdmi;
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arm926ejs_common_t *arm926ejs;
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arm_jtag_t *jtag_info;
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if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
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return ERROR_OK;
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}
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jtag_info = &arm7_9->jtag_info;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu);
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}
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static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical)
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{
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int retval;
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@ -169,154 +169,3 @@ int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_m
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return retval;
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}
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int armv4_5_mmu_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu)
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{
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int count = 1;
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int size = 4;
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uint32_t address = 0;
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int i;
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char output[128];
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int output_len;
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int retval;
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uint8_t *buffer;
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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if (argc < 1)
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return ERROR_OK;
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if (argc == 2)
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count = strtoul(args[1], NULL, 0);
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address = strtoul(args[0], NULL, 0);
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switch (cmd[2])
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{
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case 'w':
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size = 4;
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break;
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case 'h':
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size = 2;
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break;
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case 'b':
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size = 1;
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break;
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default:
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return ERROR_OK;
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}
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buffer = calloc(count, size);
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if ((retval = armv4_5_mmu_read_physical(target, armv4_5_mmu, address, size, count, buffer)) != ERROR_OK)
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{
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switch (retval)
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{
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case ERROR_TARGET_UNALIGNED_ACCESS:
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command_print(cmd_ctx, "error: address not aligned");
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break;
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case ERROR_TARGET_NOT_HALTED:
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command_print(cmd_ctx, "error: target must be halted for memory accesses");
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break;
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case ERROR_TARGET_DATA_ABORT:
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command_print(cmd_ctx, "error: access caused data abort, system possibly corrupted");
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break;
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default:
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command_print(cmd_ctx, "error: unknown error");
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}
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}
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output_len = 0;
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for (i = 0; i < count; i++)
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{
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if (i%8 == 0)
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output_len += snprintf(output + output_len, 128 - output_len, "0x%8.8" PRIx32 ": ", address + (i*size));
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switch (size)
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{
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case 4:
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output_len += snprintf(output + output_len, 128 - output_len, "%8.8" PRIx32 " ", target_buffer_get_u32(target, &buffer[i*4]));
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break;
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case 2:
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output_len += snprintf(output + output_len, 128 - output_len, "%4.4x ", target_buffer_get_u16(target, &buffer[i*2]));
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break;
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case 1:
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output_len += snprintf(output + output_len, 128 - output_len, "%2.2x ", buffer[i*1]);
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break;
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}
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if ((i % 8 == 7) || (i == count - 1))
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{
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command_print(cmd_ctx, "%s", output);
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output_len = 0;
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}
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}
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free(buffer);
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return ERROR_OK;
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}
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int armv4_5_mmu_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu)
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{
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uint32_t address = 0;
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uint32_t value = 0;
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int retval;
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uint8_t value_buf[4];
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if (target->state != TARGET_HALTED)
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{
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command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
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return ERROR_OK;
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}
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if (argc < 2)
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return ERROR_OK;
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address = strtoul(args[0], NULL, 0);
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value = strtoul(args[1], NULL, 0);
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switch (cmd[2])
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{
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case 'w':
|
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target_buffer_set_u32(target, value_buf, value);
|
||||
retval = armv4_5_mmu_write_physical(target, armv4_5_mmu, address, 4, 1, value_buf);
|
||||
break;
|
||||
case 'h':
|
||||
target_buffer_set_u16(target, value_buf, value);
|
||||
retval = armv4_5_mmu_write_physical(target, armv4_5_mmu, address, 2, 1, value_buf);
|
||||
break;
|
||||
case 'b':
|
||||
value_buf[0] = value;
|
||||
retval = armv4_5_mmu_write_physical(target, armv4_5_mmu, address, 1, 1, value_buf);
|
||||
break;
|
||||
default:
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
switch (retval)
|
||||
{
|
||||
case ERROR_TARGET_UNALIGNED_ACCESS:
|
||||
command_print(cmd_ctx, "error: address not aligned");
|
||||
break;
|
||||
case ERROR_TARGET_DATA_ABORT:
|
||||
command_print(cmd_ctx, "error: access caused data abort, system possibly corrupted");
|
||||
break;
|
||||
case ERROR_TARGET_NOT_HALTED:
|
||||
command_print(cmd_ctx, "error: target must be halted for memory accesses");
|
||||
break;
|
||||
case ERROR_OK:
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx, "error: unknown error");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
@ -46,10 +46,6 @@ extern uint32_t armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t
|
|||
extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
|
||||
extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
|
||||
|
||||
extern int armv4_5_mmu_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
|
||||
extern int armv4_5_mmu_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
|
||||
extern int armv4_5_mmu_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
|
||||
|
||||
enum
|
||||
{
|
||||
ARMV4_5_MMU_ENABLED = 0x1,
|
||||
|
|
Loading…
Reference in New Issue