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at91sam3: Wrong PLLA frequency calculations 

The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.

Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Thomas Schmid 2013-03-23 13:13:46 -06:00 committed by Peter Stuge
parent 0fd0b8ee7c
commit 1da9e595ec
1 changed files with 2 additions and 2 deletions
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4
src/flash/nor/at91sam3.c
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@ -2399,8 +2399,8 @@ static void sam3_explain_ckgr_plla(struct sam3_chip *pChip)
LOG_USER("\tPLLA Freq: (Disabled,mula = 0)"); LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
else if (diva == 0) else if (diva == 0)
LOG_USER("\tPLLA Freq: (Disabled,diva = 0)"); LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
else if (diva == 1) { else if (diva >= 1) {
pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1)); pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva);
LOG_USER("\tPLLA Freq: %3.03f MHz", LOG_USER("\tPLLA Freq: %3.03f MHz",
_tomhz(pChip->cfg.plla_freq)); _tomhz(pChip->cfg.plla_freq));
} }