From 1ba3986eb78cdd02e12c99f2f3a8ba0766ddeac8 Mon Sep 17 00:00:00 2001 From: Ryan Macdonald Date: Thu, 12 Apr 2018 12:26:54 -0700 Subject: [PATCH] More test/SBA RTL debug --- src/target/riscv/riscv-013.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index d9df6d1e2..050814597 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3027,9 +3027,9 @@ static int riscv013_test_sba_config_reg(struct target *target, /* Test 6: Write to misaligned address */ sbcs = set_field(sbcs_orig, DMI_SBCS_SBACCESS, 1); - write_memory_sba_simple(target, legal_address+1, test_patterns, 1, sbcs); + write_memory_sba_simple(target, legal_address+1, test_patterns, 1, sbcs); - dmi_read(target, &rd_val, DMI_SBCS); + dmi_read(target, &rd_val, DMI_SBCS); if (get_field(rd_val, DMI_SBCS_SBERROR) == 3) { sbcs = set_field(sbcs_orig, DMI_SBCS_SBERROR, 1); dmi_write(target, DMI_SBCS, sbcs);