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Merge up to 07141132a7 from upstream 

Change-Id: Ibca0c8093e2983e1ee199f79ed777f5136794195
This commit is contained in:
Evgeniy Naydanov 2024-03-07 12:38:57 +03:00
parent ca7d882526 07141132a7
commit 19acf51c39
10 changed files with 106 additions and 72 deletions
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6
src/flash/nor/xcf.c
View File

@ -130,8 +130,8 @@ static struct xcf_status read_status(struct flash_bank *bank)
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue(); jtag_execute_queue();
ret.isc_error = ((irdata[0] >> 7) & 3) == 0b01; ret.isc_error = ((irdata[0] >> 7) & 3) == 1;
ret.prog_error = ((irdata[0] >> 5) & 3) == 0b01; ret.prog_error = ((irdata[0] >> 5) & 3) == 1;
ret.prog_busy = ((irdata[0] >> 4) & 1) == 0; ret.prog_busy = ((irdata[0] >> 4) & 1) == 0;
ret.isc_mode = ((irdata[0] >> 3) & 1) == 1; ret.isc_mode = ((irdata[0] >> 3) & 1) == 1;
@ -528,7 +528,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank)
{ {
uint8_t buf[4]; uint8_t buf[4];
uint32_t btc = 0xFFFFFFFF; uint32_t btc = 0xFFFFFFFF;
btc &= ~0b1111; btc &= ~0xF;
btc |= ((bank->num_sectors - 1) << 2); btc |= ((bank->num_sectors - 1) << 2);
btc &= ~(1 << 4); btc &= ~(1 << 4);
h_u32_to_le(buf, btc); h_u32_to_le(buf, btc);

2
src/jtag/commands.c
View File

@ -103,7 +103,7 @@ void *cmd_queue_alloc(size_t size)
if (*p_page) { if (*p_page) {
p_page = &cmd_queue_pages_tail; p_page = &cmd_queue_pages_tail;
if (CMD_QUEUE_PAGE_SIZE - (*p_page)->used < size) if (CMD_QUEUE_PAGE_SIZE < (*p_page)->used + size)
p_page = &((*p_page)->next); p_page = &((*p_page)->next);
} }

9
src/jtag/drivers/driver.c
View File

@ -116,12 +116,21 @@ int interface_jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields,
/* count devices in bypass */ /* count devices in bypass */
size_t bypass_devices = 0; size_t bypass_devices = 0;
size_t all_devices = 0;
for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) { for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) {
all_devices++;
if (tap->bypass) if (tap->bypass)
bypass_devices++; bypass_devices++;
} }
if (all_devices == bypass_devices) {
LOG_ERROR("At least one TAP shouldn't be in BYPASS mode");
return ERROR_FAIL;
}
struct jtag_command *cmd = cmd_queue_alloc(sizeof(struct jtag_command)); struct jtag_command *cmd = cmd_queue_alloc(sizeof(struct jtag_command));
struct scan_command *scan = cmd_queue_alloc(sizeof(struct scan_command)); struct scan_command *scan = cmd_queue_alloc(sizeof(struct scan_command));
struct scan_field *out_fields = cmd_queue_alloc((in_num_fields + bypass_devices) * sizeof(struct scan_field)); struct scan_field *out_fields = cmd_queue_alloc((in_num_fields + bypass_devices) * sizeof(struct scan_field));

18
src/jtag/drivers/mpsse.c
View File

@ -265,6 +265,24 @@ static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t vids[], c
case 0x900: case 0x900:
ctx->type = TYPE_FT232H; ctx->type = TYPE_FT232H;
break; break;
case 0x2800:
ctx->type = TYPE_FT2233HP;
break;
case 0x2900:
ctx->type = TYPE_FT4233HP;
break;
case 0x3000:
ctx->type = TYPE_FT2232HP;
break;
case 0x3100:
ctx->type = TYPE_FT4232HP;
break;
case 0x3200:
ctx->type = TYPE_FT233HP;
break;
case 0x3300:
ctx->type = TYPE_FT232HP;
break;
default: default:
LOG_ERROR("unsupported FTDI chip type: 0x%04x", desc.bcdDevice); LOG_ERROR("unsupported FTDI chip type: 0x%04x", desc.bcdDevice);
goto error; goto error;

6
src/jtag/drivers/mpsse.h
View File

@ -24,6 +24,12 @@ enum ftdi_chip_type {
TYPE_FT2232H, TYPE_FT2232H,
TYPE_FT4232H, TYPE_FT4232H,
TYPE_FT232H, TYPE_FT232H,
TYPE_FT2233HP,
TYPE_FT4233HP,
TYPE_FT2232HP,
TYPE_FT4232HP,
TYPE_FT233HP,
TYPE_FT232HP,
}; };
struct mpsse_ctx; struct mpsse_ctx;

12
src/server/gdb_server.c
View File

@ -1047,9 +1047,6 @@ static int gdb_new_connection(struct connection *connection)
gdb_connection->output_flag = GDB_OUTPUT_NO; gdb_connection->output_flag = GDB_OUTPUT_NO;
gdb_connection->unique_index = next_unique_id++; gdb_connection->unique_index = next_unique_id++;
/* send ACK to GDB for debug request */
gdb_write(connection, "+", 1);
/* output goes through gdb connection */ /* output goes through gdb connection */
command_set_output_handler(connection->cmd_ctx, gdb_output, connection); command_set_output_handler(connection->cmd_ctx, gdb_output, connection);
@ -3380,7 +3377,7 @@ static int gdb_v_packet(struct connection *connection,
} }
if (strncmp(packet, "vFlashErase:", 12) == 0) { if (strncmp(packet, "vFlashErase:", 12) == 0) {
unsigned long addr; target_addr_t addr;
unsigned long length; unsigned long length;
char const *parse = packet + 12; char const *parse = packet + 12;
@ -3389,7 +3386,7 @@ static int gdb_v_packet(struct connection *connection,
return ERROR_SERVER_REMOTE_CLOSED; return ERROR_SERVER_REMOTE_CLOSED;
} }
addr = strtoul(parse, (char **)&parse, 16); addr = strtoull(parse, (char **)&parse, 16);
if (*(parse++) != ',' || *parse == '\0') { if (*(parse++) != ',' || *parse == '\0') {
LOG_ERROR("incomplete vFlashErase packet received, dropping connection"); LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
@ -3437,7 +3434,7 @@ static int gdb_v_packet(struct connection *connection,
if (strncmp(packet, "vFlashWrite:", 12) == 0) { if (strncmp(packet, "vFlashWrite:", 12) == 0) {
int retval; int retval;
unsigned long addr; target_addr_t addr;
unsigned long length; unsigned long length;
char const *parse = packet + 12; char const *parse = packet + 12;
@ -3445,7 +3442,8 @@ static int gdb_v_packet(struct connection *connection,
LOG_ERROR("incomplete vFlashErase packet received, dropping connection"); LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED; return ERROR_SERVER_REMOTE_CLOSED;
} }
addr = strtoul(parse, (char **)&parse, 16);
addr = strtoull(parse, (char **)&parse, 16);
if (*(parse++) != ':') { if (*(parse++) != ':') {
LOG_ERROR("incomplete vFlashErase packet received, dropping connection"); LOG_ERROR("incomplete vFlashErase packet received, dropping connection");
return ERROR_SERVER_REMOTE_CLOSED; return ERROR_SERVER_REMOTE_CLOSED;

2
src/target/armv8_dpm.c
View File

@ -46,7 +46,7 @@ enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm)
dpm->last_el = el; dpm->last_el = el;
/* In Debug state, each bit gives the current Execution state of each EL */ /* In Debug state, each bit gives the current Execution state of each EL */
if ((rw >> el) & 0b1) if ((rw >> el) & 1)
return ARM_STATE_AARCH64; return ARM_STATE_AARCH64;
return ARM_STATE_ARM; return ARM_STATE_ARM;

114
src/target/armv8_opcodes.h
View File

@ -26,80 +26,80 @@
#define SYSTEM_AAR64_MODE_EL3T 0xC #define SYSTEM_AAR64_MODE_EL3T 0xC
#define SYSTEM_AAR64_MODE_EL3H 0xd #define SYSTEM_AAR64_MODE_EL3H 0xd
#define SYSTEM_DAIF 0b1101101000010001 #define SYSTEM_DAIF 0xDA11
#define SYSTEM_DAIF_MASK 0x3C0 #define SYSTEM_DAIF_MASK 0x3C0
#define SYSTEM_DAIF_SHIFT 6 #define SYSTEM_DAIF_SHIFT 6
#define SYSTEM_ELR_EL1 0b1100001000000001 #define SYSTEM_ELR_EL1 0xC201
#define SYSTEM_ELR_EL2 0b1110001000000001 #define SYSTEM_ELR_EL2 0xE201
#define SYSTEM_ELR_EL3 0b1111001000000001 #define SYSTEM_ELR_EL3 0xF201
#define SYSTEM_SCTLR_EL1 0b1100000010000000 #define SYSTEM_SCTLR_EL1 0xC080
#define SYSTEM_SCTLR_EL2 0b1110000010000000 #define SYSTEM_SCTLR_EL2 0xE080
#define SYSTEM_SCTLR_EL3 0b1111000010000000 #define SYSTEM_SCTLR_EL3 0xF080
#define SYSTEM_FPCR 0b1101101000100000 #define SYSTEM_FPCR 0xDA20
#define SYSTEM_FPSR 0b1101101000100001 #define SYSTEM_FPSR 0xDA21
#define SYSTEM_DAIF 0b1101101000010001 #define SYSTEM_DAIF 0xDA11
#define SYSTEM_NZCV 0b1101101000010000 #define SYSTEM_NZCV 0xDA10
#define SYSTEM_SP_EL0 0b1100001000001000 #define SYSTEM_SP_EL0 0xC208
#define SYSTEM_SP_EL1 0b1110001000001000 #define SYSTEM_SP_EL1 0xE208
#define SYSTEM_SP_EL2 0b1111001000001000 #define SYSTEM_SP_EL2 0xF208
#define SYSTEM_SP_SEL 0b1100001000010000 #define SYSTEM_SP_SEL 0xC210
#define SYSTEM_SPSR_ABT 0b1110001000011001 #define SYSTEM_SPSR_ABT 0xE219
#define SYSTEM_SPSR_FIQ 0b1110001000011011 #define SYSTEM_SPSR_FIQ 0xE21B
#define SYSTEM_SPSR_IRQ 0b1110001000011000 #define SYSTEM_SPSR_IRQ 0xE218
#define SYSTEM_SPSR_UND 0b1110001000011010 #define SYSTEM_SPSR_UND 0xE21A
#define SYSTEM_SPSR_EL1 0b1100001000000000 #define SYSTEM_SPSR_EL1 0xC200
#define SYSTEM_SPSR_EL2 0b1110001000000000 #define SYSTEM_SPSR_EL2 0xE200
#define SYSTEM_SPSR_EL3 0b1111001000000000 #define SYSTEM_SPSR_EL3 0xF200
#define SYSTEM_ISR_EL1 0b1100011000001000 #define SYSTEM_ISR_EL1 0xC608
#define SYSTEM_DBG_DSPSR_EL0 0b1101101000101000 #define SYSTEM_DBG_DSPSR_EL0 0xDA28
#define SYSTEM_DBG_DLR_EL0 0b1101101000101001 #define SYSTEM_DBG_DLR_EL0 0xDA29
#define SYSTEM_DBG_DTRRX_EL0 0b1001100000101000 #define SYSTEM_DBG_DTRRX_EL0 0x9828
#define SYSTEM_DBG_DTRTX_EL0 0b1001100000101000 #define SYSTEM_DBG_DTRTX_EL0 0x9828
#define SYSTEM_DBG_DBGDTR_EL0 0b1001100000100000 #define SYSTEM_DBG_DBGDTR_EL0 0x9820
#define SYSTEM_CCSIDR 0b1100100000000000 #define SYSTEM_CCSIDR 0xC800
#define SYSTEM_CLIDR 0b1100100000000001 #define SYSTEM_CLIDR 0xC801
#define SYSTEM_CSSELR 0b1101000000000000 #define SYSTEM_CSSELR 0xD000
#define SYSTEM_CTYPE 0b1101100000000001 #define SYSTEM_CTYPE 0xD801
#define SYSTEM_CTR 0b1101100000000001 #define SYSTEM_CTR 0xD801
#define SYSTEM_DCCISW 0b0100001111110010 #define SYSTEM_DCCISW 0x43F2
#define SYSTEM_DCCSW 0b0100001111010010 #define SYSTEM_DCCSW 0x43D2
#define SYSTEM_ICIVAU 0b0101101110101001 #define SYSTEM_ICIVAU 0x5BA9
#define SYSTEM_DCCVAU 0b0101101111011001 #define SYSTEM_DCCVAU 0x5BD9
#define SYSTEM_DCCIVAC 0b0101101111110001 #define SYSTEM_DCCIVAC 0x5BF1
#define SYSTEM_MPIDR 0b1100000000000101 #define SYSTEM_MPIDR 0xC005
#define SYSTEM_TCR_EL1 0b1100000100000010 #define SYSTEM_TCR_EL1 0xC102
#define SYSTEM_TCR_EL2 0b1110000100000010 #define SYSTEM_TCR_EL2 0xE102
#define SYSTEM_TCR_EL3 0b1111000100000010 #define SYSTEM_TCR_EL3 0xF102
#define SYSTEM_TTBR0_EL1 0b1100000100000000 #define SYSTEM_TTBR0_EL1 0xC100
#define SYSTEM_TTBR0_EL2 0b1110000100000000 #define SYSTEM_TTBR0_EL2 0xE100
#define SYSTEM_TTBR0_EL3 0b1111000100000000 #define SYSTEM_TTBR0_EL3 0xF100
#define SYSTEM_TTBR1_EL1 0b1100000100000001 #define SYSTEM_TTBR1_EL1 0xC101
/* ARMv8 address translation */ /* ARMv8 address translation */
#define SYSTEM_PAR_EL1 0b1100001110100000 #define SYSTEM_PAR_EL1 0xC3A0
#define SYSTEM_ATS12E0R 0b0110001111000110 #define SYSTEM_ATS12E0R 0x63C6
#define SYSTEM_ATS12E1R 0b0110001111000100 #define SYSTEM_ATS12E1R 0x63C4
#define SYSTEM_ATS1E2R 0b0110001111000000 #define SYSTEM_ATS1E2R 0x63C0
#define SYSTEM_ATS1E3R 0b0111001111000000 #define SYSTEM_ATS1E3R 0x73C0
/* fault status and fault address */ /* fault status and fault address */
#define SYSTEM_FAR_EL1 0b1100001100000000 #define SYSTEM_FAR_EL1 0xC300
#define SYSTEM_FAR_EL2 0b1110001100000000 #define SYSTEM_FAR_EL2 0xE300
#define SYSTEM_FAR_EL3 0b1111001100000000 #define SYSTEM_FAR_EL3 0xF300
#define SYSTEM_ESR_EL1 0b1100001010010000 #define SYSTEM_ESR_EL1 0xC290
#define SYSTEM_ESR_EL2 0b1110001010010000 #define SYSTEM_ESR_EL2 0xE290
#define SYSTEM_ESR_EL3 0b1111001010010000 #define SYSTEM_ESR_EL3 0xF290
#define ARMV8_MRS_DSPSR(rt) (0xd53b4500 | (rt)) #define ARMV8_MRS_DSPSR(rt) (0xd53b4500 | (rt))
#define ARMV8_MSR_DSPSR(rt) (0xd51b4500 | (rt)) #define ARMV8_MSR_DSPSR(rt) (0xd51b4500 | (rt))

5
src/target/espressif/esp_xtensa_smp.c
View File

@ -94,8 +94,11 @@ int esp_xtensa_smp_soft_reset_halt(struct target *target)
LOG_TARGET_DEBUG(target, "begin"); LOG_TARGET_DEBUG(target, "begin");
/* in SMP mode we need to ensure that at first we reset SOC on PRO-CPU /* in SMP mode we need to ensure that at first we reset SOC on PRO-CPU
and then call xtensa_assert_reset() for all cores */ and then call xtensa_assert_reset() for all cores */
if (target->smp && target->coreid != 0) if (target->smp) {
head = list_first_entry(target->smp_targets, struct target_list, lh);
if (head->target != target)
return ERROR_OK; return ERROR_OK;
}
/* Reset the SoC first */ /* Reset the SoC first */
if (esp_xtensa_smp->chip_ops->reset) { if (esp_xtensa_smp->chip_ops->reset) {
res = esp_xtensa_smp->chip_ops->reset(target); res = esp_xtensa_smp->chip_ops->reset(target);

2
src/target/riscv/riscv.c
View File

@ -5889,7 +5889,7 @@ int riscv_init_registers(struct target *target)
.type = REG_TYPE_ARCH_DEFINED, .type = REG_TYPE_ARCH_DEFINED,
.id = "FPU_FD", .id = "FPU_FD",
.type_class = REG_TYPE_CLASS_UNION, .type_class = REG_TYPE_CLASS_UNION,
.reg_type_union = &single_double_union { .reg_type_union = &single_double_union }
}; };
static struct reg_data_type type_uint8 = { .type = REG_TYPE_UINT8, .id = "uint8" }; static struct reg_data_type type_uint8 = { .type = REG_TYPE_UINT8, .id = "uint8" };
static struct reg_data_type type_uint16 = { .type = REG_TYPE_UINT16, .id = "uint16" }; static struct reg_data_type type_uint16 = { .type = REG_TYPE_UINT16, .id = "uint16" };