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If we know which trigger hit, don't disassemble. 

Change-Id: I1d7b6ffa91b0557e2e74e544e4b35033ed3e3553
Signed-off-by: Tim Newsome <tim@sifive.com>
This commit is contained in:
Tim Newsome 2022-04-27 13:02:00 -07:00
parent 73199226df
commit 1979ad5594
1 changed files with 11 additions and 4 deletions
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15
src/target/riscv/riscv.c
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@ -1086,12 +1086,19 @@ static int riscv_hit_trigger_hit_bit(struct target *target, uint32_t *unique_id)
* and new value. */ * and new value. */
int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint) int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
{ {
RISCV_INFO(r);
LOG_DEBUG("Current hartid = %d", riscv_current_hartid(target)); LOG_DEBUG("Current hartid = %d", riscv_current_hartid(target));
/*TODO instead of disassembling the instruction that we think caused the /* If we identified which trigger caused the halt earlier, then just use
* trigger, check the hit bit of each watchpoint first. The hit bit is * that. */
* simpler and more reliable to check but as it is optional and relatively for (struct watchpoint *wp = target->watchpoints; wp; wp = wp->next) {
* new, not all hardware will implement it */ if (wp->unique_id == r->trigger_hit) {
*hit_watchpoint = wp;
return ERROR_OK;
}
}
riscv_reg_t dpc; riscv_reg_t dpc;
riscv_get_register(target, &dpc, GDB_REGNO_DPC); riscv_get_register(target, &dpc, GDB_REGNO_DPC);
const uint8_t length = 4; const uint8_t length = 4;