AT91R40008/Ethernut 3 configuration
Moved board specific settings from target/at91r40008.cfg to a new file board/ethernut3.cfg. Set correct CPUTAPID. Reset delay increased, see MIC2775 data sheet. Increased work area size from 16k to 128k. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
Harald Kipp
David Brownell
parent
5750e899e0
commit
18969466c9
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#
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# Ethernut 3 board configuration file
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#
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# http://www.ethernut.de/en/hardware/enut3/
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# AT91R40008-66AU ARM7TDMI Microcontroller
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# 256kB internal RAM
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source [find target/at91r40008.cfg]
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# AT49BV322A-70TU NOR Flash
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# 2M x 16 mode at address 0x10000000
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# Common flash interface supported
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#
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
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# Micrel MIC2775-29YM5 Supervisor
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# Reset output will remain active for 280ms (maximum)
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#
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jtag_nsrst_delay 300
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jtag_ntrst_delay 300
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads enable
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jtag_khz 16000
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# Target events
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#
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$_TARGETNAME configure -event reset-init { board_init }
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# Initialize board hardware
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#
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proc board_init { } {
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board_remap
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flash probe 0
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}
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# Memory remap
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#
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proc board_remap {{VERBOSE 0}} {
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# CS0: NOR flash
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# 16MB @ 0x10000000
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# 16-bit data bus
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# 4 wait states
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#
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mww 0xffe00000 0x1000212d
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# CS1: Ethernet controller
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# 1MB @ 0x20000000
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# 16-bit data bus
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# 2 wait states
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# Byte select access
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#
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mww 0xffe00004 0x20003025
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# CS2: CPLD registers
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# 1MB @ 0x21000000
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# 8-bit data bus
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# 2 wait states
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#
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mww 0xffe00008 0x21002026
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# CS3: Expansion bus
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# 1MB @ 0x22000000
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# 8-bit data bus
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# 8 wait states
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#
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mww 0xffe00010 0x22002e3e
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# Remap command
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#
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mww 0xffe00020 0x00000001
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if {$VERBOSE != 0} {
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puts "0x00000000 RAM"
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puts "0x10000000 Flash"
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puts "0x20000000 Ethernet"
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puts "0x21000000 CPLD"
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puts "0x22000000 Expansion"
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}
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}
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@ -1,9 +1,13 @@
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# AT91R40008 target configuration file
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# TRST is tied to SRST on the AT91X40 family.
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reset_config srst_only srst_pulls_trst
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if { [info exists CHIPNAME] } {
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if {[info exists CHIPNAME]} {
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set _CHIPNAME $CHIPNAME
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set _CHIPNAME $CHIPNAME
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} else {
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} else {
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set _CHIPNAME at9r40008
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set _CHIPNAME at91r40008
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}
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}
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if { [info exists ENDIAN] } {
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if { [info exists ENDIAN] } {
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@ -12,41 +16,14 @@ if { [info exists ENDIAN] } {
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set _ENDIAN little
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set _ENDIAN little
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}
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}
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# Setup the JTAG scan chain.
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if { [info exists CPUTAPID ] } {
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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set _CPUTAPID $CPUTAPID
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} else {
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x1f0f0f0f
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set _CPUTAPID 0xffffffff
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}
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}
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
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$_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0
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$_TARGETNAME configure -event gdb-flash-erase-start {
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wait_halt
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sleep 10
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poll
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# Ethernut 3 remapping is required to access external flash memory.
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mww 0xffe00000 0x1000213d
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mww 0xffe00004 0x20003e3d
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mww 0xffe00020 0x00000001
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}
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$_TARGETNAME configure -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
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# For more information about the configuration files, take a look at:
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# openocd.texi
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