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jtag/swd: rename CamelCase macros 

Change-Id: I4bce678b67d3d2347e88da9507820837697b5aa7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6302
Tested-by: jenkins
This commit is contained in:
Antonio Borneo 2021-06-06 17:20:10 +02:00
parent 20ee64ae4b
commit 1887e2a273
9 changed files with 67 additions and 67 deletions
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16
src/jtag/drivers/bitbang.c
View File

@ -455,7 +455,7 @@ static void swd_clear_sticky_errors(void)
static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{ {
LOG_DEBUG("bitbang_swd_read_reg"); LOG_DEBUG("bitbang_swd_read_reg");
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
if (queued_retval != ERROR_OK) { if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval); LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
@ -478,8 +478,8 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
data); data);
@ -492,7 +492,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay
} }
if (value) if (value)
*value = data; *value = data;
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
return; return;
case SWD_ACK_WAIT: case SWD_ACK_WAIT:
@ -514,7 +514,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay
static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{ {
LOG_DEBUG("bitbang_swd_write_reg"); LOG_DEBUG("bitbang_swd_write_reg");
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
if (queued_retval != ERROR_OK) { if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval); LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
@ -537,14 +537,14 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay
int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3); int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32)); buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
switch (ack) { switch (ack) {
case SWD_ACK_OK: case SWD_ACK_OK:
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
return; return;
case SWD_ACK_WAIT: case SWD_ACK_WAIT:

18
src/jtag/drivers/buspirate.c
View File

@ -1365,7 +1365,7 @@ static uint8_t buspirate_swd_write_header(uint8_t cmd)
tmp[5] = 0x07; /* write mode trn_1 */ tmp[5] = 0x07; /* write mode trn_1 */
tmp[6] = 0x07; /* write mode trn_2 */ tmp[6] = 0x07; /* write mode trn_2 */
to_send = ((cmd & SWD_CMD_RnW) == 0) ? 7 : 5; to_send = ((cmd & SWD_CMD_RNW) == 0) ? 7 : 5;
buspirate_serial_write(buspirate_fd, tmp, to_send); buspirate_serial_write(buspirate_fd, tmp, to_send);
/* read ack */ /* read ack */
@ -1411,7 +1411,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
uint8_t tmp[16]; uint8_t tmp[16];
LOG_DEBUG("buspirate_swd_read_reg"); LOG_DEBUG("buspirate_swd_read_reg");
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
if (queued_retval != ERROR_OK) { if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skip buspirate_swd_read_reg because queued_retval=%d", queued_retval); LOG_DEBUG("Skip buspirate_swd_read_reg because queued_retval=%d", queued_retval);
@ -1441,8 +1441,8 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
data); data);
@ -1455,7 +1455,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
} }
if (value) if (value)
*value = data; *value = data;
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
buspirate_swd_idle_clocks(ap_delay_clk); buspirate_swd_idle_clocks(ap_delay_clk);
return; return;
case SWD_ACK_WAIT: case SWD_ACK_WAIT:
@ -1478,7 +1478,7 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del
uint8_t tmp[16]; uint8_t tmp[16];
LOG_DEBUG("buspirate_swd_write_reg"); LOG_DEBUG("buspirate_swd_write_reg");
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
if (queued_retval != ERROR_OK) { if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skip buspirate_swd_write_reg because queued_retval=%d", queued_retval); LOG_DEBUG("Skip buspirate_swd_write_reg because queued_retval=%d", queued_retval);
@ -1499,14 +1499,14 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
value); value);
switch (ack) { switch (ack) {
case SWD_ACK_OK: case SWD_ACK_OK:
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
buspirate_swd_idle_clocks(ap_delay_clk); buspirate_swd_idle_clocks(ap_delay_clk);
return; return;
case SWD_ACK_WAIT: case SWD_ACK_WAIT:

20
src/jtag/drivers/cmsis_dap.c
View File

@ -787,8 +787,8 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
uint32_t data = transfer->data; uint32_t data = transfer->data;
LOG_DEBUG_IO("%s %s reg %x %"PRIx32, LOG_DEBUG_IO("%s %s reg %x %"PRIx32,
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, data); (cmd & SWD_CMD_A32) >> 1, data);
/* When proper WAIT handling is implemented in the /* When proper WAIT handling is implemented in the
@ -802,8 +802,8 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
* cmsis_dap_cmd_dap_swd_configure() in * cmsis_dap_cmd_dap_swd_configure() in
* cmsis_dap_init(). * cmsis_dap_init().
*/ */
if (!(cmd & SWD_CMD_RnW) && if (!(cmd & SWD_CMD_RNW) &&
!(cmd & SWD_CMD_APnDP) && !(cmd & SWD_CMD_APNDP) &&
(cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT && (cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT &&
(data & CORUNDETECT)) { (data & CORUNDETECT)) {
LOG_DEBUG("refusing to enable sticky overrun detection"); LOG_DEBUG("refusing to enable sticky overrun detection");
@ -811,7 +811,7 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
} }
command[idx++] = (cmd >> 1) & 0x0f; command[idx++] = (cmd >> 1) & 0x0f;
if (!(cmd & SWD_CMD_RnW)) { if (!(cmd & SWD_CMD_RNW)) {
h_u32_to_le(&command[idx], data); h_u32_to_le(&command[idx], data);
idx += 4; idx += 4;
} }
@ -886,7 +886,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
size_t idx = 3; size_t idx = 3;
for (int i = 0; i < transfer_count; i++) { for (int i = 0; i < transfer_count; i++) {
struct pending_transfer_result *transfer = &(block->transfers[i]); struct pending_transfer_result *transfer = &(block->transfers[i]);
if (transfer->cmd & SWD_CMD_RnW) { if (transfer->cmd & SWD_CMD_RNW) {
static uint32_t last_read; static uint32_t last_read;
uint32_t data = le_to_h_u32(&resp[idx]); uint32_t data = le_to_h_u32(&resp[idx]);
uint32_t tmp = data; uint32_t tmp = data;
@ -895,7 +895,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
LOG_DEBUG_IO("Read result: %"PRIx32, data); LOG_DEBUG_IO("Read result: %"PRIx32, data);
/* Imitate posted AP reads */ /* Imitate posted AP reads */
if ((transfer->cmd & SWD_CMD_APnDP) || if ((transfer->cmd & SWD_CMD_APNDP) ||
((transfer->cmd & SWD_CMD_A32) >> 1 == DP_RDBUFF)) { ((transfer->cmd & SWD_CMD_A32) >> 1 == DP_RDBUFF)) {
tmp = last_read; tmp = last_read;
last_read = data; last_read = data;
@ -959,7 +959,7 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
struct pending_transfer_result *transfer = &(block->transfers[block->transfer_count]); struct pending_transfer_result *transfer = &(block->transfers[block->transfer_count]);
transfer->data = data; transfer->data = data;
transfer->cmd = cmd; transfer->cmd = cmd;
if (cmd & SWD_CMD_RnW) { if (cmd & SWD_CMD_RNW) {
/* Queue a read transaction */ /* Queue a read transaction */
transfer->buffer = dst; transfer->buffer = dst;
} }
@ -968,13 +968,13 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
static void cmsis_dap_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) static void cmsis_dap_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{ {
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
cmsis_dap_swd_queue_cmd(cmd, NULL, value); cmsis_dap_swd_queue_cmd(cmd, NULL, value);
} }
static void cmsis_dap_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) static void cmsis_dap_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{ {
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
cmsis_dap_swd_queue_cmd(cmd, value, 0); cmsis_dap_swd_queue_cmd(cmd, value, 0);
} }

16
src/jtag/drivers/ftdi.c
View File

@ -1112,17 +1112,17 @@ static int ftdi_swd_run_queue(void)
LOG_DEBUG_IO("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG_IO("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
swd_cmd_queue[i].cmd & SWD_CMD_APnDP ? "AP" : "DP", swd_cmd_queue[i].cmd & SWD_CMD_APNDP ? "AP" : "DP",
swd_cmd_queue[i].cmd & SWD_CMD_RnW ? "read" : "write", swd_cmd_queue[i].cmd & SWD_CMD_RNW ? "read" : "write",
(swd_cmd_queue[i].cmd & SWD_CMD_A32) >> 1, (swd_cmd_queue[i].cmd & SWD_CMD_A32) >> 1,
buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn,
1 + 3 + (swd_cmd_queue[i].cmd & SWD_CMD_RnW ? 0 : 1), 32)); 1 + 3 + (swd_cmd_queue[i].cmd & SWD_CMD_RNW ? 0 : 1), 32));
if (ack != SWD_ACK_OK) { if (ack != SWD_ACK_OK) {
queued_retval = ack == SWD_ACK_WAIT ? ERROR_WAIT : ERROR_FAIL; queued_retval = ack == SWD_ACK_WAIT ? ERROR_WAIT : ERROR_FAIL;
goto skip; goto skip;
} else if (swd_cmd_queue[i].cmd & SWD_CMD_RnW) { } else if (swd_cmd_queue[i].cmd & SWD_CMD_RNW) {
uint32_t data = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3, 32); uint32_t data = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3, 32);
int parity = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3 + 32, 1); int parity = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3 + 32, 1);
@ -1172,7 +1172,7 @@ static void ftdi_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32
mpsse_clock_data_out(mpsse_ctx, &swd_cmd_queue[i].cmd, 0, 8, SWD_MODE); mpsse_clock_data_out(mpsse_ctx, &swd_cmd_queue[i].cmd, 0, 8, SWD_MODE);
if (swd_cmd_queue[i].cmd & SWD_CMD_RnW) { if (swd_cmd_queue[i].cmd & SWD_CMD_RNW) {
/* Queue a read transaction */ /* Queue a read transaction */
swd_cmd_queue[i].dst = dst; swd_cmd_queue[i].dst = dst;
@ -1197,20 +1197,20 @@ static void ftdi_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32
} }
/* Insert idle cycles after AP accesses to avoid WAIT */ /* Insert idle cycles after AP accesses to avoid WAIT */
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
mpsse_clock_data_out(mpsse_ctx, NULL, 0, ap_delay_clk, SWD_MODE); mpsse_clock_data_out(mpsse_ctx, NULL, 0, ap_delay_clk, SWD_MODE);
} }
static void ftdi_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) static void ftdi_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{ {
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
ftdi_swd_queue_cmd(cmd, value, 0, ap_delay_clk); ftdi_swd_queue_cmd(cmd, value, 0, ap_delay_clk);
} }
static void ftdi_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) static void ftdi_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{ {
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
ftdi_swd_queue_cmd(cmd, NULL, value, ap_delay_clk); ftdi_swd_queue_cmd(cmd, NULL, value, ap_delay_clk);
} }

8
src/jtag/drivers/jlink.c
View File

@ -1978,13 +1978,13 @@ static int jlink_swd_init(void)
static void jlink_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) static void jlink_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{ {
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
jlink_swd_queue_cmd(cmd, NULL, value, ap_delay_clk); jlink_swd_queue_cmd(cmd, NULL, value, ap_delay_clk);
} }
static void jlink_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) static void jlink_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{ {
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
jlink_swd_queue_cmd(cmd, value, 0, ap_delay_clk); jlink_swd_queue_cmd(cmd, value, 0, ap_delay_clk);
} }
@ -2237,7 +2237,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3
pending_scan_results_buffer[pending_scan_results_length].first = tap_length; pending_scan_results_buffer[pending_scan_results_length].first = tap_length;
if (cmd & SWD_CMD_RnW) { if (cmd & SWD_CMD_RNW) {
/* Queue a read transaction. */ /* Queue a read transaction. */
pending_scan_results_buffer[pending_scan_results_length].length = 32; pending_scan_results_buffer[pending_scan_results_length].length = 32;
pending_scan_results_buffer[pending_scan_results_length].buffer = dst; pending_scan_results_buffer[pending_scan_results_length].buffer = dst;
@ -2257,7 +2257,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3
pending_scan_results_length++; pending_scan_results_length++;
/* Insert idle cycles after AP accesses to avoid WAIT. */ /* Insert idle cycles after AP accesses to avoid WAIT. */
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
jlink_queue_data_out(NULL, ap_delay_clk); jlink_queue_data_out(NULL, ap_delay_clk);
} }

18
src/jtag/drivers/kitprog.c
View File

@ -625,13 +625,13 @@ static int kitprog_swd_init(void)
static void kitprog_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) static void kitprog_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{ {
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
kitprog_swd_queue_cmd(cmd, NULL, value); kitprog_swd_queue_cmd(cmd, NULL, value);
} }
static void kitprog_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) static void kitprog_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{ {
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
kitprog_swd_queue_cmd(cmd, value, 0); kitprog_swd_queue_cmd(cmd, value, 0);
} }
@ -699,8 +699,8 @@ static int kitprog_swd_run_queue(void)
* cmsis_dap_cmd_DAP_SWD_Configure() in * cmsis_dap_cmd_DAP_SWD_Configure() in
* cmsis_dap_init(). * cmsis_dap_init().
*/ */
if (!(cmd & SWD_CMD_RnW) && if (!(cmd & SWD_CMD_RNW) &&
!(cmd & SWD_CMD_APnDP) && !(cmd & SWD_CMD_APNDP) &&
(cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT && (cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT &&
(data & CORUNDETECT)) { (data & CORUNDETECT)) {
LOG_DEBUG("refusing to enable sticky overrun detection"); LOG_DEBUG("refusing to enable sticky overrun detection");
@ -708,13 +708,13 @@ static int kitprog_swd_run_queue(void)
} }
LOG_DEBUG_IO("%s %s reg %x %"PRIx32, LOG_DEBUG_IO("%s %s reg %x %"PRIx32,
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, data); (cmd & SWD_CMD_A32) >> 1, data);
buffer[write_count++] = (cmd | SWD_CMD_START | SWD_CMD_PARK) & ~SWD_CMD_STOP; buffer[write_count++] = (cmd | SWD_CMD_START | SWD_CMD_PARK) & ~SWD_CMD_STOP;
read_count++; read_count++;
if (!(cmd & SWD_CMD_RnW)) { if (!(cmd & SWD_CMD_RNW)) {
buffer[write_count++] = (data) & 0xff; buffer[write_count++] = (data) & 0xff;
buffer[write_count++] = (data >> 8) & 0xff; buffer[write_count++] = (data >> 8) & 0xff;
buffer[write_count++] = (data >> 16) & 0xff; buffer[write_count++] = (data >> 16) & 0xff;
@ -761,7 +761,7 @@ static int kitprog_swd_run_queue(void)
} }
for (int i = 0; i < pending_transfer_count; i++) { for (int i = 0; i < pending_transfer_count; i++) {
if (pending_transfers[i].cmd & SWD_CMD_RnW) { if (pending_transfers[i].cmd & SWD_CMD_RNW) {
uint32_t data = le_to_h_u32(&buffer[read_index]); uint32_t data = le_to_h_u32(&buffer[read_index]);
LOG_DEBUG_IO("Read result: %"PRIx32, data); LOG_DEBUG_IO("Read result: %"PRIx32, data);
@ -802,7 +802,7 @@ static void kitprog_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
pending_transfers[pending_transfer_count].data = data; pending_transfers[pending_transfer_count].data = data;
pending_transfers[pending_transfer_count].cmd = cmd; pending_transfers[pending_transfer_count].cmd = cmd;
if (cmd & SWD_CMD_RnW) { if (cmd & SWD_CMD_RNW) {
/* Queue a read transaction */ /* Queue a read transaction */
pending_transfers[pending_transfer_count].buffer = dst; pending_transfers[pending_transfer_count].buffer = dst;
} }

14
src/jtag/drivers/xds110.c
View File

@ -1165,9 +1165,9 @@ static int xds110_swd_switch_seq(enum swd_special_seq seq)
static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value) static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value)
{ {
/* Make sure this is a read request */ /* Make sure this is a read request */
bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); bool is_read_request = (0 != (SWD_CMD_RNW & cmd));
/* Determine whether this is a DP or AP register access */ /* Determine whether this is a DP or AP register access */
uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP;
/* Determine the AP number from cached SELECT value */ /* Determine the AP number from cached SELECT value */
uint32_t ap_num = (xds110.select & 0xff000000) >> 24; uint32_t ap_num = (xds110.select & 0xff000000) >> 24;
/* Extract register address from command */ /* Extract register address from command */
@ -1227,9 +1227,9 @@ static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value)
static bool xds110_legacy_write_reg(uint8_t cmd, uint32_t value) static bool xds110_legacy_write_reg(uint8_t cmd, uint32_t value)
{ {
/* Make sure this isn't a read request */ /* Make sure this isn't a read request */
bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); bool is_read_request = (0 != (SWD_CMD_RNW & cmd));
/* Determine whether this is a DP or AP register access */ /* Determine whether this is a DP or AP register access */
uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP;
/* Determine the AP number from cached SELECT value */ /* Determine the AP number from cached SELECT value */
uint32_t ap_num = (xds110.select & 0xff000000) >> 24; uint32_t ap_num = (xds110.select & 0xff000000) >> 24;
/* Extract register address from command */ /* Extract register address from command */
@ -1296,7 +1296,7 @@ static int xds110_swd_run_queue(void)
result = 0; result = 0;
while (xds110.txn_requests[request] != 0) { while (xds110.txn_requests[request] != 0) {
cmd = xds110.txn_requests[request++]; cmd = xds110.txn_requests[request++];
if (0 == (SWD_CMD_RnW & cmd)) { if (0 == (SWD_CMD_RNW & cmd)) {
/* DAP register write command */ /* DAP register write command */
value = (uint32_t)(xds110.txn_requests[request++]) << 0; value = (uint32_t)(xds110.txn_requests[request++]) << 0;
value |= (uint32_t)(xds110.txn_requests[request++]) << 8; value |= (uint32_t)(xds110.txn_requests[request++]) << 8;
@ -1329,9 +1329,9 @@ static int xds110_swd_run_queue(void)
static void xds110_swd_queue_cmd(uint8_t cmd, uint32_t *value) static void xds110_swd_queue_cmd(uint8_t cmd, uint32_t *value)
{ {
/* Check if this is a read or write request */ /* Check if this is a read or write request */
bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); bool is_read_request = (0 != (SWD_CMD_RNW & cmd));
/* Determine whether this is a DP or AP register access */ /* Determine whether this is a DP or AP register access */
uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP;
/* Extract register address from command */ /* Extract register address from command */
uint32_t address = ((cmd & SWD_CMD_A32) >> 1); uint32_t address = ((cmd & SWD_CMD_A32) >> 1);
uint32_t request_size = (is_read_request) ? 1 : 5; uint32_t request_size = (is_read_request) ? 1 : 5;

16
src/jtag/drivers/xlnx-pcie-xvc.c
View File

@ -535,7 +535,7 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value,
uint32_t res, ack, rpar; uint32_t res, ack, rpar;
int err; int err;
assert(cmd & SWD_CMD_RnW); assert(cmd & SWD_CMD_RNW);
cmd |= SWD_CMD_START | SWD_CMD_PARK; cmd |= SWD_CMD_START | SWD_CMD_PARK;
/* cmd + ack */ /* cmd + ack */
@ -558,8 +558,8 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value,
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ?
"WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
res); res);
switch (ack) { switch (ack) {
@ -571,7 +571,7 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value,
} }
if (value) if (value)
*value = res; *value = res;
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL);
queued_retval = err; queued_retval = err;
return; return;
@ -598,7 +598,7 @@ static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value,
uint32_t res, ack; uint32_t res, ack;
int err; int err;
assert(!(cmd & SWD_CMD_RnW)); assert(!(cmd & SWD_CMD_RNW));
cmd |= SWD_CMD_START | SWD_CMD_PARK; cmd |= SWD_CMD_START | SWD_CMD_PARK;
/* cmd + trn + ack */ /* cmd + trn + ack */
@ -621,14 +621,14 @@ static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value,
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ?
"WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APnDP ? "AP" : "DP", cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RnW ? "read" : "write", cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, (cmd & SWD_CMD_A32) >> 1,
value); value);
switch (ack) { switch (ack) {
case SWD_ACK_OK: case SWD_ACK_OK:
if (cmd & SWD_CMD_APnDP) if (cmd & SWD_CMD_APNDP)
err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL);
queued_retval = err; queued_retval = err;
return; return;

8
src/jtag/swd.h
View File

@ -24,8 +24,8 @@
* first bit on the wire is START * first bit on the wire is START
*/ */
#define SWD_CMD_START (1 << 0) /* always set */ #define SWD_CMD_START (1 << 0) /* always set */
#define SWD_CMD_APnDP (1 << 1) /* set only for AP access */ #define SWD_CMD_APNDP (1 << 1) /* set only for AP access */
#define SWD_CMD_RnW (1 << 2) /* set only for read access */ #define SWD_CMD_RNW (1 << 2) /* set only for read access */
#define SWD_CMD_A32 (3 << 3) /* bits A[3:2] of register addr */ #define SWD_CMD_A32 (3 << 3) /* bits A[3:2] of register addr */
#define SWD_CMD_PARITY (1 << 5) /* parity of APnDP|RnW|A32 */ #define SWD_CMD_PARITY (1 << 5) /* parity of APnDP|RnW|A32 */
#define SWD_CMD_STOP (0 << 6) /* always clear for synch SWD */ #define SWD_CMD_STOP (0 << 6) /* always clear for synch SWD */
@ -38,8 +38,8 @@
*/ */
static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum) static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum)
{ {
uint8_t cmd = (is_ap ? SWD_CMD_APnDP : 0) uint8_t cmd = (is_ap ? SWD_CMD_APNDP : 0)
| (is_read ? SWD_CMD_RnW : 0) | (is_read ? SWD_CMD_RNW : 0)
| ((regnum & 0xc) << 1); | ((regnum & 0xc) << 1);
/* 8 cmd bits 4:1 may be set */ /* 8 cmd bits 4:1 may be set */