XScale: initial PXA3xx support
[dbrownell@users.sourceforge.net: user's guide; variant param is optional] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -3117,6 +3117,7 @@ There are several variants defined:
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@code{pxa27x} ... instruction register length is 7 bits
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@item @code{pxa250}, @code{pxa255},
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@code{pxa26x} ... instruction register length is 5 bits
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@item @code{pxa3xx} ... instruction register length is 11 bits
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@end itemize
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@end itemize
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@end deffn
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@ -191,7 +191,8 @@ static int xscale_read_dcsr(struct target *target)
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uint8_t field2_check_mask = 0x1;
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jtag_set_end_state(TAP_DRPAUSE);
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xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
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xscale_jtag_set_instr(target->tap,
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XSCALE_SELDCSR << xscale->xscale_variant);
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buf_set_u32(&field0, 1, 1, xscale->hold_rst);
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buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
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@ -256,6 +257,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words
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if (num_words == 0)
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return ERROR_INVALID_ARGUMENTS;
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struct xscale_common *xscale = target_to_xscale(target);
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int retval = ERROR_OK;
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tap_state_t path[3];
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struct scan_field fields[3];
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@ -289,7 +291,8 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words
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fields[2].check_mask = &field2_check_mask;
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_DBGTX);
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xscale_jtag_set_instr(target->tap,
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XSCALE_DBGTX << xscale->xscale_variant);
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jtag_add_runtest(1, jtag_get_end_state()); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
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/* repeat until all words have been collected */
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@ -371,7 +374,8 @@ static int xscale_read_tx(struct target *target, int consume)
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_DBGTX);
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xscale_jtag_set_instr(target->tap,
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XSCALE_DBGTX << xscale->xscale_variant);
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path[0] = TAP_DRSELECT;
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path[1] = TAP_DRCAPTURE;
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@ -469,7 +473,8 @@ static int xscale_write_rx(struct target *target)
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_DBGRX);
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xscale_jtag_set_instr(target->tap,
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XSCALE_DBGRX << xscale->xscale_variant);
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memset(&fields, 0, sizeof fields);
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@ -541,6 +546,7 @@ static int xscale_write_rx(struct target *target)
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/* send count elements of size byte to the debug handler */
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static int xscale_send(struct target *target, uint8_t *buffer, int count, int size)
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{
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struct xscale_common *xscale = target_to_xscale(target);
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uint32_t t[3];
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int bits[3];
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int retval;
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@ -548,7 +554,8 @@ static int xscale_send(struct target *target, uint8_t *buffer, int count, int si
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_DBGRX);
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xscale_jtag_set_instr(target->tap,
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XSCALE_DBGRX << xscale->xscale_variant);
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bits[0]=3;
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t[0]=0;
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@ -629,7 +636,8 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br
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xscale->external_debug_break = ext_dbg_brk;
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
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xscale_jtag_set_instr(target->tap,
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XSCALE_SELDCSR << xscale->xscale_variant);
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buf_set_u32(&field0, 1, 1, xscale->hold_rst);
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buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
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@ -683,6 +691,7 @@ static unsigned int parity (unsigned int v)
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static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8])
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{
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struct xscale_common *xscale = target_to_xscale(target);
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uint8_t packet[4];
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uint8_t cmd;
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int word;
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@ -692,7 +701,8 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
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/* LDIC into IR */
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_LDIC);
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xscale_jtag_set_instr(target->tap,
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XSCALE_LDIC << xscale->xscale_variant);
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/* CMD is b011 to load a cacheline into the Mini ICache.
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* Loading into the main ICache is deprecated, and unused.
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@ -738,12 +748,14 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
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static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
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{
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struct xscale_common *xscale = target_to_xscale(target);
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uint8_t packet[4];
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uint8_t cmd;
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struct scan_field fields[2];
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_LDIC);
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xscale_jtag_set_instr(target->tap,
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XSCALE_LDIC << xscale->xscale_variant);
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/* CMD for invalidate IC line b000, bits [6:4] b000 */
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buf_set_u32(&cmd, 0, 6, 0x0);
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@ -1479,7 +1491,8 @@ static int xscale_assert_reset(struct target *target)
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* end up in T-L-R, which would reset JTAG
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*/
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jtag_set_end_state(TAP_IDLE);
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xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
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xscale_jtag_set_instr(target->tap,
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XSCALE_SELDCSR << xscale->xscale_variant);
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/* set Hold reset, Halt mode and Trap Reset */
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buf_set_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 30, 1, 0x1);
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@ -2876,10 +2889,10 @@ static int xscale_init_arch_info(struct target *target,
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armv4_5 = &xscale->armv4_5_common;
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/* store architecture specfic data (none so far) */
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/* store architecture specfic data */
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xscale->common_magic = XSCALE_COMMON_MAGIC;
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/* we don't really *need* variant info ... */
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/* we don't really *need* a variant param ... */
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if (variant) {
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int ir_length = 0;
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@ -2892,6 +2905,8 @@ static int xscale_init_arch_info(struct target *target,
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|| strcmp(variant, "ixp45x") == 0
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|| strcmp(variant, "ixp46x") == 0)
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ir_length = 7;
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else if (strcmp(variant, "pxa3xx") == 0)
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ir_length = 11;
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else
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LOG_WARNING("%s: unrecognized variant %s",
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tap->dotted_name, variant);
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@ -2903,6 +2918,12 @@ static int xscale_init_arch_info(struct target *target,
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}
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}
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/* PXA3xx shifts the JTAG instructions */
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if (tap->ir_length == 11)
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xscale->xscale_variant = XSCALE_PXA3XX;
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else
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xscale->xscale_variant = XSCALE_IXP4XX_PXA2XX;
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/* the debug handler isn't installed (and thus not running) at this time */
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xscale->handler_address = 0xfe000800;
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@ -37,6 +37,10 @@
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#define XSCALE_LDIC 0x07
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#define XSCALE_SELDCSR 0x09
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/* Possible CPU types */
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#define XSCALE_IXP4XX_PXA2XX 0x0
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#define XSCALE_PXA3XX 0x4
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enum xscale_debug_reason
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{
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XSCALE_DBG_REASON_GENERIC,
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@ -129,6 +133,9 @@ struct xscale_common
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uint32_t cp15_control_reg;
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int fast_memory_access;
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/* CPU variant */
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int xscale_variant;
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};
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static inline struct xscale_common *
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