target/mips32: pracc write cp0 status register first
When user requested a change on cp0 status register, it may contain changes on EXL/ERL bits, and changes on these bits could lead to differnt behaviours on writing to other cp0 registers. Change-Id: Ic83039988c29c06ee134226b52de943c46d19da2 Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7914 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -842,12 +842,12 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
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};
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};
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uint32_t cp0_write_data[] = {
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uint32_t cp0_write_data[] = {
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/* status */
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c0rs[0],
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/* lo */
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/* lo */
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gprs[32],
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gprs[32],
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/* hi */
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/* hi */
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gprs[33],
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gprs[33],
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/* status */
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c0rs[0],
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/* badvaddr */
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/* badvaddr */
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c0rs[1],
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c0rs[1],
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/* cause */
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/* cause */
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@ -856,6 +856,9 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
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c0rs[3],
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c0rs[3],
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};
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};
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/* Write CP0 Status Register first, changes on EXL or ERL bits
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* may lead to different behaviour on writing to other CP0 registers.
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*/
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for (size_t i = 0; i < ARRAY_SIZE(cp0_write_code); i++) {
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for (size_t i = 0; i < ARRAY_SIZE(cp0_write_code); i++) {
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/* load CP0 value in $1 */
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/* load CP0 value in $1 */
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pracc_add_li32(&ctx, 1, cp0_write_data[i], 0);
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pracc_add_li32(&ctx, 1, cp0_write_data[i], 0);
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