interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

cortex_m: deprecate soft_reset_halt 

soft_reset_halt was only really intended for the older arm arch, eg. armv4/5.
Newer arch such as armv7m/mips do not need this as they have better alternatives.

Change-Id: Ifb360680b7e4bfa5365f3c79d82574bded952b45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1442
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This commit is contained in:
Spencer Oliver 2013-06-12 17:26:13 +01:00
parent 3e90b63b1f
commit 146dfe3295
1 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/target/cortex_m.c
View File

@ -632,6 +632,12 @@ static int cortex_m3_soft_reset_halt(struct target *target)
uint32_t dcb_dhcsr = 0; uint32_t dcb_dhcsr = 0;
int retval, timeout = 0; int retval, timeout = 0;
/* soft_reset_halt is deprecated on cortex_m as the same functionality
* can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'
* As this reset only used VC_CORERESET it would only ever reset the cortex_m
* core, not the peripherals */
LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
/* Enter debug state on reset; restore DEMCR in endreset_event() */ /* Enter debug state on reset; restore DEMCR in endreset_event() */
retval = mem_ap_write_u32(swjdp, DCB_DEMCR, retval = mem_ap_write_u32(swjdp, DCB_DEMCR,
TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET); TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);