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zy1000: revc FPGA now works 

remove kludge code.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2009-12-07 12:38:56 +01:00
parent 29a8cdc3b0
commit 134df4b701
2 changed files with 6 additions and 30 deletions
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24
src/jtag/zy1000/jtag_minidriver.h
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@ -32,33 +32,9 @@ int diag_printf(const char *fmt, ...);
#define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b); diag_printf("peek 0x%08x = 0x%08x\n", a, b) #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b); diag_printf("peek 0x%08x = 0x%08x\n", a, b)
#else #else
#define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b) #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b)
#ifdef CYGPKG_HAL_NIOS2
#define ZY1000_POKE(a, b) \
{/* This will flush the bridge FIFO. Overflowed bridge FIFO fails. We must \
flush every "often". No precise system has been found, but 4 seems solid. \
This code goes away once the FPGA has been fixed. */ \
\
CYG_INTERRUPT_STATE _old_; \
HAL_DISABLE_INTERRUPTS(_old_); \
HAL_WRITE_UINT32(a, b);\
static int overflow_counter = 0; \
if (++overflow_counter >= 1) \
{ \
/* clear FIFO */ \
cyg_uint32 empty; ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty); \
overflow_counter = 0; \
} \
/* NB! interrupts must be restored *after* read */ \
HAL_RESTORE_INTERRUPTS(_old_); \
}\
#else
#define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b) #define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b)
#endif #endif
#endif
// FIFO empty? // FIFO empty?
static __inline__ void waitIdle(void) static __inline__ void waitIdle(void)
{ {

12
src/jtag/zy1000/zy1000.c
View File

@ -93,8 +93,8 @@ static bool readPowerDropout(void)
{ {
cyg_uint32 state; cyg_uint32 state;
// sample and clear power dropout // sample and clear power dropout
HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x80); ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
HAL_READ_UINT32(ZY1000_JTAG_BASE + 0x10, state); ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
bool powerDropout; bool powerDropout;
powerDropout = (state & 0x80) != 0; powerDropout = (state & 0x80) != 0;
return powerDropout; return powerDropout;
@ -105,8 +105,8 @@ static bool readSRST(void)
{ {
cyg_uint32 state; cyg_uint32 state;
// sample and clear SRST sensing // sample and clear SRST sensing
HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x00000040); ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
HAL_READ_UINT32(ZY1000_JTAG_BASE + 0x10, state); ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
bool srstAsserted; bool srstAsserted;
srstAsserted = (state & 0x40) != 0; srstAsserted = (state & 0x40) != 0;
return srstAsserted; return srstAsserted;
@ -218,10 +218,10 @@ static void setPower(bool power)
savePower = power; savePower = power;
if (power) if (power)
{ {
HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x14, 0x8); ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
} else } else
{ {
HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x8); ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
} }
} }