cfg: Make stm32f4x usable with SWD transport
Change-Id: Ib8f3b414ec3c31cf8a112e75efe003e2237c59bb Signed-off-by: Fatih Aşıcı <fatih.asici@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1951 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
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@ -25,19 +25,6 @@ if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE 0x10000
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set _WORKAREASIZE 0x10000
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}
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 1000
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adapter_nsrst_delay 100
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if {$using_jtag} {
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jtag_ntrst_delay 100
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}
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#jtag scan chain
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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set _CPUTAPID $CPUTAPID
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@ -73,6 +60,19 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
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set _FLASHNAME $_CHIPNAME.flash
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
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flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 1000
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adapter_nsrst_delay 100
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if {$using_jtag} {
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jtag_ntrst_delay 100
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}
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# if srst is not fitted use SYSRESETREQ to
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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# perform a soft reset
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cortex_m reset_config sysresetreq
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cortex_m reset_config sysresetreq
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