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Make the Atmel SAM3 family SWD-aware 

Atmel's SAM3 and SAM4 processor families are very close to each other
in many respects.  However, so far, only the SAM4 target script
contained the magic to allow using SWD, while SAM3 was tied to JTAG
only.  This e.g. prevented the CMSIS-DAP driver from accessing SAM3
devices as it only uses SWD transport (by now).

The patch pulls all the things from the SAM4 target script that are
also applicable to SAM3 devices.  With the patch, an Atmel CMSIS-DAP
debugger (Atmel-ICE) was proven to be able to successfully attach to a
SAM3S-EK evaluation kit.  I also cross-checked that accessing through
a SAM-ICE (Segger J-Link) still works with the patch.

Change-Id: I20dafbff8e1e9f967da950e48a56205586eeef8d
Signed-off-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-on: http://openocd.zylin.com/2046
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Jörg Wunsch 2014-03-14 11:29:24 +01:00 committed by Spencer Oliver
parent 325066149f
commit 122ec5fbe2
1 changed files with 32 additions and 19 deletions
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49
tcl/target/at91sam3XXX.cfg
View File

@ -24,6 +24,9 @@
# at91sam3X8C
# at91sam3X8E
# at91sam3X8H
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
@ -36,6 +39,33 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
# Work-area is a space in RAM used for flash programming
# By default use 64kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
}
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
# 16K is plenty, the smallest chip has this much
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
$_TARGETNAME configure -event gdb-flash-erase-start {
halt
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
@ -46,25 +76,8 @@ if { [info exists ENDIAN] } {
adapter_khz 500
adapter_nsrst_delay 100
if {$using_jtag} {
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
# 16K is plenty, the smallest chip has this much
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
$_TARGETNAME configure -event gdb-flash-erase-start {
halt
}
# if srst is not fitted use SYSRESETREQ to