- Fixes '>>' whitespace
- Replace ')\(>>\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(>>\)(' with '\1 \2 ('. - Replace '\(\w\)\(>>\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2369 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
parent
6319ea33f7
commit
0e2c2fe1d1
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@ -366,13 +366,13 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
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at91sam7_info = t_bank->driver_priv;
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at91sam7_info->cidr = cidr;
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at91sam7_info->cidr_ext = (cidr>>31)&0x0001;
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at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007;
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at91sam7_info->cidr_arch = (cidr>>20)&0x00FF;
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at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F;
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at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F;
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at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F;
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at91sam7_info->cidr_eproc = (cidr>>5)&0x0007;
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at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
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at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
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at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
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at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
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at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
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at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
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at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
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at91sam7_info->cidr_version = cidr&0x001F;
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/* calculate master clock frequency */
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@ -391,10 +391,10 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
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return ERROR_OK;
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}
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arch = (cidr>>20)&0x00FF;
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arch = (cidr >> 20)&0x00FF;
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/* check flash size */
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switch ((cidr>>8)&0x000F)
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switch ((cidr >> 8)&0x000F)
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{
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case FLASH_SIZE_8KB:
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break;
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@ -586,13 +586,13 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
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at91sam7_info = t_bank->driver_priv;
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at91sam7_info->cidr = cidr;
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at91sam7_info->cidr_ext = (cidr>>31)&0x0001;
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at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007;
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at91sam7_info->cidr_arch = (cidr>>20)&0x00FF;
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at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F;
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at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F;
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at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F;
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at91sam7_info->cidr_eproc = (cidr>>5)&0x0007;
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at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
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at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
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at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
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at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
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at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
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at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
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at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
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at91sam7_info->cidr_version = cidr&0x001F;
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at91sam7_info->target_name = target_name;
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@ -702,12 +702,12 @@ static int at91sam7_protect_check(struct flash_bank_s *bank)
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}
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status = at91sam7_get_flash_status(bank->target, bank->bank_number);
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at91sam7_info->lockbits = (status>>16);
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at91sam7_info->lockbits = (status >> 16);
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at91sam7_info->num_lockbits_on = 0;
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for (lock_pos=0; lock_pos<bank->num_sectors; lock_pos++)
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{
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if ( ((status>>(16+lock_pos))&(0x0001)) == 1)
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if ( ((status >> (16+lock_pos))&(0x0001)) == 1)
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{
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at91sam7_info->num_lockbits_on++;
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bank->sectors[lock_pos].is_protected = 1;
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@ -719,13 +719,13 @@ static int at91sam7_protect_check(struct flash_bank_s *bank)
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/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
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status = at91sam7_get_flash_status(bank->target, 0);
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at91sam7_info->securitybit = (status>>4)&0x01;
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at91sam7_info->nvmbits = (status>>8)&0xFF;
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at91sam7_info->securitybit = (status >> 4)&0x01;
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at91sam7_info->nvmbits = (status >> 8)&0xFF;
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at91sam7_info->num_nvmbits_on = 0;
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for (gpnvm_pos=0; gpnvm_pos<at91sam7_info->num_nvmbits; gpnvm_pos++)
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{
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if ( ((status>>(8+gpnvm_pos))&(0x01)) == 1)
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if ( ((status >> (8+gpnvm_pos))&(0x01)) == 1)
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{
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at91sam7_info->num_nvmbits_on++;
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}
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@ -374,7 +374,7 @@ static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cm
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j,
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p->sectors[j].offset,
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p->sectors[j].size,
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p->sectors[j].size>>10,
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p->sectors[j].size >> 10,
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protect_state);
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}
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@ -465,7 +465,7 @@ static int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, c
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j,
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p->sectors[j].offset,
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p->sectors[j].size,
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p->sectors[j].size>>10,
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p->sectors[j].size >> 10,
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erase_state);
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}
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}
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@ -32,7 +32,7 @@ int flash_init(void)
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{
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unsigned int nvpsiz;
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nvpsiz=(inr(DBGU_CIDR)>>8)&0xf;
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nvpsiz=(inr(DBGU_CIDR) >> 8)&0xf;
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switch (nvpsiz) {
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case 3:
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@ -129,7 +129,7 @@ int flash_erase_plane(int efc_ofs)
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int page_num;
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page_num=0;
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lockbits=inr(MC_FSR+efc_ofs)>>16;
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lockbits=inr(MC_FSR+efc_ofs) >> 16;
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while (lockbits) {
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if (lockbits&1) {
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@ -605,11 +605,11 @@ static int pic32mx_probe(struct flash_bank_s *bank)
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device_id = ejtag_info->idcode;
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LOG_INFO( "device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)",
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device_id,
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(unsigned)((device_id>>1)&0x7ff),
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(unsigned)((device_id>>12)&0xff),
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(unsigned)((device_id>>20)&0xfff) );
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(unsigned)((device_id >> 1)&0x7ff),
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(unsigned)((device_id >> 12)&0xff),
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(unsigned)((device_id >> 20)&0xfff) );
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if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
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if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
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LOG_WARNING( "Cannot identify target as a PIC32MX family." );
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return ERROR_FLASH_OPERATION_FAILED;
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}
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@ -697,10 +697,10 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
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device_id = ejtag_info->idcode;
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if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
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if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
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snprintf(buf, buf_size,
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"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
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(unsigned)((device_id>>1)&0x7ff),
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(unsigned)((device_id >> 1)&0x7ff),
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PIC32MX_MANUF_ID);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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@ -716,7 +716,7 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
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buf += printed;
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buf_size -= printed;
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printed = snprintf(buf, buf_size, " Ver: 0x%03x",
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(unsigned)((device_id>>20)&0xfff));
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(unsigned)((device_id >> 20)&0xfff));
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return ERROR_OK;
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}
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@ -33,7 +33,7 @@
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#include "binarybuffer.h"
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#define DID0_VER(did0) ((did0>>28)&0x07)
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#define DID0_VER(did0) ((did0 >> 28)&0x07)
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static int stellaris_register_commands(struct command_context_s *cmd_ctx);
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static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
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static int stellaris_erase(struct flash_bank_s *bank, int first, int last);
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@ -286,7 +286,7 @@ static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
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if (DID0_VER(stellaris_info->did0) > 0)
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{
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device_class = (stellaris_info->did0>>16) & 0xFF;
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device_class = (stellaris_info->did0 >> 16) & 0xFF;
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}
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else
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{
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@ -298,7 +298,7 @@ static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
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device_class,
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StellarisClassname[device_class],
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stellaris_info->target_name,
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(int)('A' + ((stellaris_info->did0>>8) & 0xFF)),
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(int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
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(int)((stellaris_info->did0) & 0xFF));
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buf += printed;
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buf_size -= printed;
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@ -309,7 +309,7 @@ static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
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stellaris_info->did1,
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stellaris_info->did1,
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"ARMV7M",
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(int)((1+((stellaris_info->dc0>>16) & 0xFFFF))/4),
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(int)((1+((stellaris_info->dc0 >> 16) & 0xFFFF))/4),
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(int)((1+(stellaris_info->dc0 & 0xFFFF))*2));
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buf += printed;
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buf_size -= printed;
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@ -366,11 +366,11 @@ static void stellaris_read_clock_info(flash_bank_t *bank)
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LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
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stellaris_info->rcc = rcc;
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sysdiv = (rcc>>23) & 0xF;
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usesysdiv = (rcc>>22) & 0x1;
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bypass = (rcc>>11) & 0x1;
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oscsrc = (rcc>>4) & 0x3;
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/* xtal = (rcc>>6)&0xF; */
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sysdiv = (rcc >> 23) & 0xF;
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usesysdiv = (rcc >> 22) & 0x1;
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bypass = (rcc >> 11) & 0x1;
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oscsrc = (rcc >> 4) & 0x3;
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/* xtal = (rcc >> 6)&0xF; */
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switch (oscsrc)
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{
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case 0:
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@ -34,10 +34,10 @@ static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int
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{
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if ((num==32) && (first==0))
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{
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buffer[3]=(value>>24)&0xff;
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buffer[2]=(value>>16)&0xff;
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buffer[1]=(value>>8)&0xff;
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buffer[0]=(value>>0)&0xff;
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buffer[3]=(value >> 24)&0xff;
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buffer[2]=(value >> 16)&0xff;
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buffer[1]=(value >> 8)&0xff;
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buffer[0]=(value >> 0)&0xff;
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} else
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{
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unsigned int i;
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@ -6958,7 +6958,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
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case JIM_EXPROP_LTE: wC = wA <= wB; break;
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case JIM_EXPROP_GTE: wC = wA >= wB; break;
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case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
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case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
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case JIM_EXPROP_RSHIFT: wC = wA >> wB; break;
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case JIM_EXPROP_NUMEQ: wC = wA==wB; break;
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case JIM_EXPROP_NUMNE: wC = wA != wB; break;
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case JIM_EXPROP_BITAND: wC = wA&wB; break;
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@ -6996,7 +6996,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
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wC = _rotl(uA,(unsigned long)wB);
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#else
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const unsigned int S = sizeof(unsigned long) * 8;
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wC = (unsigned long)((uA<<wB)|(uA>>(S-wB)));
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wC = (unsigned long)((uA<<wB)|(uA >> (S-wB)));
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#endif
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break;
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}
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@ -7006,7 +7006,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
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wC = _rotr(uA,(unsigned long)wB);
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#else
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const unsigned int S = sizeof(unsigned long) * 8;
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wC = (unsigned long)((uA>>wB)|(uA<<(S-wB)));
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wC = (unsigned long)((uA >> wB)|(uA<<(S-wB)));
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#endif
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break;
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}
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@ -106,7 +106,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
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}
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/* shift out value */
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waitIdle();
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ZY1000_POKE(ZY1000_JTAG_BASE+0x28, (((value>>i)&1)<<1)|tms);
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ZY1000_POKE(ZY1000_JTAG_BASE+0x28, (((value >> i)&1)<<1)|tms);
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}
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waitIdle();
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ZY1000_POKE(ZY1000_JTAG_BASE+0x28, 0);
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@ -131,11 +131,11 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
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for (i=0; i<repeat-1; i++)
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{
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sampleShiftRegister();
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ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value>>i);
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ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value >> i);
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ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|a);
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}
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sampleShiftRegister();
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ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value>>(repeat-1));
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ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value >> (repeat-1));
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ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|b);
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} else
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{
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@ -474,7 +474,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_
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for (l=0; l<k; l += 8)
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{
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inBuffer[(j+l)/8]=(value>>l)&0xff;
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inBuffer[(j+l)/8]=(value >> l)&0xff;
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}
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}
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j += k;
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@ -1103,12 +1103,12 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
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mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
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mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
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mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
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component_start = component_base - 0x1000*(c_pid4>>4);
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component_start = component_base - 0x1000*(c_pid4 >> 4);
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command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
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command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1>>4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
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command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
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command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
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command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
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/* For CoreSight components, (c_cid1>>4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
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/* For CoreSight components, (c_cid1 >> 4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
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}
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else
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{
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@ -198,6 +198,6 @@ extern int arm_evaluate_opcode(uint32_t opcode, uint32_t address, arm_instructio
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extern int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, arm_instruction_t *instruction);
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extern int arm_access_size(arm_instruction_t *instruction);
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#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000)>>28])
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#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])
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#endif /* ARM_DISASSEMBLER_H */
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@ -2792,7 +2792,7 @@ static void writeLong(FILE *f, int l)
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int i;
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for (i=0; i<4; i++)
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{
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char c=(l>>(i*8))&0xff;
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char c=(l >> (i*8))&0xff;
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writeData(f, &c, 1);
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}
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@ -2883,7 +2883,7 @@ static void writeGmon(uint32_t *samples, uint32_t sampleNum, char *filename)
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val=65535;
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}
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data[i*2]=val&0xff;
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data[i*2+1]=(val>>8)&0xff;
|
||||
data[i*2+1]=(val >> 8)&0xff;
|
||||
}
|
||||
free(buckets);
|
||||
writeData(f, data, length * 2);
|
||||
|
|
Loading…
Reference in New Issue