From 0e1fe03f4ba2b313d80c0a2d3c2ecfb7aee85a77 Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Mon, 1 Aug 2022 19:28:18 +0200 Subject: [PATCH] target/arm: do not expose 'arm reg', 'arm mcr/mrc' commands on Cortex-M Tcl commands 'arm reg', 'arm mcr/mrc' do not work on M-profile based devices. Isolate them from 'arm core_state' and 'arm disassemble' and do not chain them from armv7m_command_handlers. Change-Id: I2c6befdf82575e95cf05ed158ab5e6faa1a182c3 Signed-off-by: Tomas Vanek Reviewed-on: https://review.openocd.org/c/openocd/+/7101 Reviewed-by: Antonio Borneo Tested-by: jenkins --- src/target/arm.h | 1 + src/target/armv4_5.c | 36 ++++++++++++++++++++++-------------- src/target/armv7m.c | 6 +++++- 3 files changed, 28 insertions(+), 15 deletions(-) diff --git a/src/target/arm.h b/src/target/arm.h index f262255ab..bcfa85c79 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -273,6 +273,7 @@ void arm_free_reg_cache(struct arm *arm); struct reg_cache *armv8_build_reg_cache(struct target *target); extern const struct command_registration arm_command_handlers[]; +extern const struct command_registration arm_all_profiles_command_handlers[]; int arm_arch_state(struct target *target); const char *arm_get_gdb_arch(struct target *target); diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 09cf143e6..321772699 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -1125,20 +1125,6 @@ static const struct command_registration arm_exec_command_handlers[] = { .help = "display ARM core registers", .usage = "", }, - { - .name = "core_state", - .handler = handle_arm_core_state_command, - .mode = COMMAND_EXEC, - .usage = "['arm'|'thumb']", - .help = "display/change ARM core state", - }, - { - .name = "disassemble", - .handler = handle_arm_disassemble_command, - .mode = COMMAND_EXEC, - .usage = "address [count ['thumb']]", - .help = "disassemble instructions", - }, { .name = "mcr", .mode = COMMAND_EXEC, @@ -1153,11 +1139,33 @@ static const struct command_registration arm_exec_command_handlers[] = { .help = "read coprocessor register", .usage = "cpnum op1 CRn CRm op2", }, + { + .chain = arm_all_profiles_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; + +const struct command_registration arm_all_profiles_command_handlers[] = { + { + .name = "core_state", + .handler = handle_arm_core_state_command, + .mode = COMMAND_EXEC, + .usage = "['arm'|'thumb']", + .help = "display/change ARM core state", + }, + { + .name = "disassemble", + .handler = handle_arm_disassemble_command, + .mode = COMMAND_EXEC, + .usage = "address [count ['thumb']]", + .help = "disassemble instructions", + }, { .chain = semihosting_common_handlers, }, COMMAND_REGISTRATION_DONE }; + const struct command_registration arm_command_handlers[] = { { .name = "arm", diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 790e70e63..be0de509b 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -1085,7 +1085,11 @@ int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found) const struct command_registration armv7m_command_handlers[] = { { - .chain = arm_command_handlers, + .name = "arm", + .mode = COMMAND_ANY, + .help = "ARM command group", + .usage = "", + .chain = arm_all_profiles_command_handlers, }, COMMAND_REGISTRATION_DONE };